Signature hiding techniques for FPGA intellectual property protection

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Signature hiding techniques for FPGA intellectual property protection

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International Conference on Computer Aided Design archive
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California, United States

Pages: 186 - 189

Year of Publication: 1998

ISBN:1-58113-008-2

Authors

John Lach	Departments of Electrical Engineeringl, The University of California, Los Angeles
William H. Mangione-Smith	Departments of Electrical Engineeringl, The University of California, Los Angeles
Miodrag Potkonjak	Computer Science, The University of California, Los Angeles

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
IEEE-EDS : Electronic Devices Society
IEEE-CAS : Circuits & Systems

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 8, Downloads (12 Months): 57, Citation Count: 7

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Anderson, R., and Kuhn, M. Tamper resistance- A cautionary note. Proceedings of the Second USENIX Workshop on Electronic Commerce. (1996), 1-1 I.
	2	Charbon, E. Hierarchical watermarking in IC design. Proceedings of the Custom Integrated Circuits Conference '98. (1998).
	3	Cox, I.J. et al. Secure spread spectrum watermarking for images, audio and video. Proceedings of the Third International Conference on Image Processing. (1996), 243- 246.
	4	Diffie, W. and Hellman, M. New directions on cryptography. IEEE Transactions on Information Theory. IT-22, 6 (Nov. 1976), 644-654.
	5	Hong, I., and Potkonjak, M. Behavioral synthesis techniques for intellectual property protection, unpublished manuscript. (1997).
	6	A. B. Kahng , J. Lach , W. H. Mangione-Smith , S. Mantik , I. L. Markov , M. Potkonjak , P. Tucker , H. Wang , G. Wolfe, Watermarking techniques for intellectual property protection, Proceedings of the 35th annual conference on Design automation, p.776-781, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277240]
	7	Jason Leonard , William H. Mangione-Smith, A case study of partially evaluated hardware circuits: Key-specific DES, Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications, p.151-160, September 01-03, 1997
	8	Bruce Schneier, Applied cryptography (2nd ed.): protocols, algorithms, and source code in C, John Wiley & Sons, Inc., New York, NY, 1995
	9	Swanson, M.D. et al. Transparent robust image watermarking, international Conference on Image Processing. (1996), 211-214.
	10	Trimberger, S. Personal communication. Xilinx Corporation. (1997).
	11	Villasenor, J. et al. Configurable computing solutions for automatic target recognition. Proceedings of lEEE Workshop on FPGAs for Custom Computing Machines. Ed. Arnold, J. and Pocek, K.L. Napa, CA (1996), 70-79.
	12	Wolfgang, R.B. and Delp, E.J. A watermark for digital images. Applications of Toral Automorphisms. 3 (1996), 219-222.
	13	XJlinx. The Programmable Logic Data Book. San Jose, CA (1996).

CITED BY 7

	Adarsh K. Jain , Lin Yuan , Pushkin R. Pari , Gang Qu, Zero overhead watermarking technique for FPGA designs, Proceedings of the 13th ACM Great Lakes symposium on VLSI, April 28-29, 2003, Washington, D. C., USA
	John Lach , William H. Mangione-Smith , Miodrag Potkonjak, Robust FPGA intellectual property protection through multiple small watermarks, Proceedings of the 36th ACM/IEEE conference on Design automation, p.831-836, June 21-25, 1999, New Orleans, Louisiana, United States
	Arlindo L. Oliveira, Robust techniques for watermarking sequential circuit designs, Proceedings of the 36th ACM/IEEE conference on Design automation, p.837-842, June 21-25, 1999, New Orleans, Louisiana, United States
	Daniel Ziener , Jürgen Teich, Power Signature Watermarking of IP Cores for FPGAs, Journal of Signal Processing Systems, v.51 n.1, p.123-136, April 2008
	M. Moiz Khan , Spyros Tragoudas, A method for hardware metering, Proceedings of the 9th WSEAS International Conference on Communications, p.1-4, July 14-16, 2005, Athens, Greece
	J. Castillo , P. Huerta , J. I. Martínez, Secure IP downloading for SRAM FPGAs, Microprocessors & Microsystems, v.31 n.2, p.77-86, March, 2007
	Jarrod A. Roy , Farinaz Koushanfar , Igor L. Markov, Protecting bus-based hardware IP by secret sharing, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California