The Stanford FLASH multiprocessor

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The Stanford FLASH multiprocessor

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International Symposium on Computer Architecture archive
25 years of the international symposia on Computer architecture (selected papers) table of contents

Barcelona, Spain

Pages: 485 - 496

Year of Publication: 1998

ISBN:1-58113-058-9

Authors

Jeffrey Kuskin	Computer Systems Laboratory, Stanford University, Stanford, CA
David Ofelt	Computer Systems Laboratory, Stanford University, Stanford, CA
Mark Heinrich	Computer Systems Laboratory, Stanford University, Stanford, CA
John Heinlein	Computer Systems Laboratory, Stanford University, Stanford, CA
Richard Simoni	Computer Systems Laboratory, Stanford University, Stanford, CA
K. Gharachorloo	Computer Systems Laboratory, Stanford University, Stanford, CA
J. Chapin	Computer Systems Laboratory, Stanford University, Stanford, CA
D. Nakahira	Computer Systems Laboratory, Stanford University, Stanford, CA
J. Baxter	Computer Systems Laboratory, Stanford University, Stanford, CA
M. Horowitz	Computer Systems Laboratory, Stanford University, Stanford, CA
A. Gupta	Computer Systems Laboratory, Stanford University, Stanford, CA
M. Rosenblum	Computer Systems Laboratory, Stanford University, Stanford, CA
J. Hennessy	Computer Systems Laboratory, Stanford University, Stanford, CA

Sponsors

IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 19, Downloads (12 Months): 89, Citation Count: 1

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	ACD+91	A. Agarwal , D. Chaiken , K. Johnson , D. Kranz , J. Kubiatowicz , K. Kurihara , B. H. Lim , G. Maa , D. Nussbaum , M. Parkin , D. Yeung, THE MIT ALEWIFE MACHINE: A LARGE-SCALE DISTRIBUTED-MEMORY MULTIPROCESSOR, Massachusetts Institute of Technology, Cambridge, MA, 1991
	Golds93	Stephen Goldschm/dL Simulation of MulUprocesso~: Accuracy and Performance. Ph.D. Thesis, Stanford University, June 1993.
	HGG94	John Heinlein , Kourosh Gharachorloo , Anoop Gupta, Integrating multiple communication paradigms in high performance multiprocessors, Stanford University, Stanford, CA, 1994
	HJ92	Dana S. Henry , Christopher F. Joerg, A tightly-coupled processor-network interface, Proceedings of the fifth international conference on Architectural support for programming languages and operating systems, p.111-122, October 12-15, 1992, Boston, Massachusetts, United States
	HM93	Mark Homewood and Moray McLaren. Meiko CS-2 Interconnect Elan-Elite Design. In Proceedings of Hot Interconnects 93, pages 2.1.1-4, Stanford University, August 1993.
	HP90	David A. Patterson , John L. Hennessy, Computer architecture: a quantitative approach, Morgan Kaufmann Publishers Inc., San Francisco, CA, 1990
	KA93	John Kubiatowicz , Anant Agarwal, Anatomy of a message in the Alewife multiprocessor, Proceedings of the 7th international conference on Supercomputing, p.195-206, July 19-23, 1993, Tokyo, Japan [doi>10.1145/165939.165970]
	KSR92	Kendall Square Research. KSRI Technical Summary. Waltham, MA, 1992.
	LLG+90	Daniel Lenoski , James Laudon , Kourosh Gharachorloo , Anoop Gupta , John Hennessy, The directory-based cache coherence protocol for the DASH multiprocessor, Proceedings of the 17th annual international symposium on Computer Architecture, p.148-159, May 28-31, 1990, Seattle, Washington, United States
	LLG+92	Daniel Lenoski , James Laudon , Kourosh Gharachorloo , Wolf-Dietrich Weber , Anoop Gupta , John Hennessy , Mark Horowitz , Monica S. Lam, The Stanford Dash Multiprocessor, Computer, v.25 n.3, p.63-79, March 1992 [doi>10.1109/2.121510]
	NPA92	R. S. Nikhil , G. M. Papadopoulos , Arvind, T: a multithreaded massively parallel architecture, Proceedings of the 19th annual international symposium on Computer architecture, p.156-167, May 19-21, 1992, Queensland, Australia
	NWD93	Michael D. Noakes , Deborah A. Wallach , William J. Dally, The J-machine multicomputer: an architectural evaluation, Proceedings of the 20th annual international symposium on Computer architecture, p.224-235, May 16-19, 1993, San Diego, California, United States
	SGS+93	Ellen Spertus , Seth Copen Goldstein , Klaus Erik Schauser , Thorsten von Eicken , David E. Culler , William J. Dally, Evaluation of mechanisms for fine-grained parallel programs in the J-machine and the CM-5, Proceedings of the 20th annual international symposium on Computer architecture, p.302-313, May 16-19, 1993, San Diego, California, United States
	SHL92	Michael D. Smith , Mark Horowitz , Monica S. Lam, Efficient superscalar performance through boosting, Proceedings of the fifth international conference on Architectural support for programming languages and operating systems, p.248-259, October 12-15, 1992, Boston, Massachusetts, United States
	Simoni92	Richard Thomas Simoni, Jr., Cache coherence directories for scalable multiprocessors, Stanford University, Stanford, CA, 1992
	Stall93	Richard Stailman. Using and porting GNU CC. Free Software Foundation, Cambridge, MA, June 1993.
	SWG92	Jaswinder Pal Singh , Wolf-Dietrich Weber , Anoop Gupta, SPLASH: Stanford parallel applications for shared-memory, ACM SIGARCH Computer Architecture News, v.20 n.1, p.5-44, March 1992 [doi>10.1145/130823.130824]
	TMC92	Thinking Machines Corporation. The Connection Machine CM-5 Technical Summary. Cambridge MA. January 1992.
	vECG+92	Thorsten von Eicken , David E. Culler , Seth Copen Goldstein , Klaus Erik Schauser, Active messages: a mechanism for integrated communication and computation, Proceedings of the 19th annual international symposium on Computer architecture, p.256-266, May 19-21, 1992, Queensland, Australia