Retrospective: weak ordering—a new definition

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Retrospective: weak ordering—a new definition

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International Symposium on Computer Architecture archive
25 years of the international symposia on Computer architecture (selected papers) table of contents

Barcelona, Spain

Pages: 63 - 66

Year of Publication: 1998

ISBN:1-58113-058-9

Authors

Sarita V. Adve	Dept. of Electrical & Computer Engineering, Rice University, Houston, TX
Mark D. Hill	Computer Sciences Dept., University of Wisconsin-Madison, Madison, WI

Sponsors

IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 13, Downloads (12 Months): 33, Citation Count: 0

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	S.V. Adve, V.S. Pai, and R Ranganathan. Recent Advances in Memory Consistency Models for Hardware Shared-Memory System, to appear in Proceedings of the IEEE, special issue on distributed shared-memory systems, 1999.
	2	Sarita V. Adve , Kourosh Gharachorloo, Shared Memory Consistency Models: A Tutorial, Computer, v.29 n.12, p.66-76, December 1996 [doi>10.1109/2.546611]
	3	Sarita V. Adve , Mark D. Hill, Weak ordering—a new definition, Proceedings of the 17th annual international symposium on Computer Architecture, p.2-14, May 28-31, 1990, Seattle, Washington, United States
	4	William W. Collier, Reasoning about parallel architectures, Prentice-Hall, Inc., Upper Saddle River, NJ, 1992
	5	M. Dubois , C. Scheurich , F. Briggs, Memory access buffering in multiprocessors, Proceedings of the 13th annual international symposium on Computer architecture, p.434-442, June 02-05, 1986, Tokyo, Japan
	6	Kourosh Gharachorloo, Anoop Gupta, and John Hennessy. Two Techniques to Enhance the Performance of Memory Consistency Models. In Proc. intl. Conf. on Parallel Processing, pages I355- I364, 1991.
	7	Kourosh Gharachorloo , Daniel Lenoski , James Laudon , Phillip Gibbons , Anoop Gupta , John Hennessy, Memory consistency and event ordering in scalable shared-memory multiprocessors, Proceedings of the 17th annual international symposium on Computer Architecture, p.15-26, May 28-31, 1990, Seattle, Washington, United States
	8	JamesR. Goodman. Cache Consistency and Sequential Consistency. Technical Report #61, SCI Committee, March 1989. Also available as Computer Sciences Technical Report #1006, University of Wisconsin, Madison, February 1991.
	9	Allan Gottlieb, Ralph Grishman, Clyde P. Kruskal, Kevin P. McAuliffe, Lawrence Rudolph, and Marc Snir. The NYU Ultracomputer - Designing an MIMD Shared Memory Parallel Computer. IEEE Trans. on Computers, pages 175-189, February 1983.
	10	Mark D. Hill, Multiprocessors Should Support Simple Memory-Consistency Models, Computer, v.31 n.8, p.28-34, August 1998 [doi>10.1109/2.707614]
	11	Pete Keleher , Alan L. Cox , Willy Zwaenepoel, Lazy release consistency for software distributed shared memory, Proceedings of the 19th annual international symposium on Computer architecture, p.13-21, May 19-21, 1992, Queensland, Australia
	12	Leslie Lamport, Time, clocks, and the ordering of events in a distributed system, Communications of the ACM, v.21 n.7, p.558-565, July 1978 [doi>10.1145/359545.359563]
	13	Leslie Lamport. How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs. IEEE Trans. on Computers, C-28(9):690- 691, September 1979.
	14	Robert H. B. Netzer and Barton P. Miller. Detecting Data Races in Parallel Program Executions. Research Monographs in Parallel and Distributed Computing, MIT Press, 1991., August 1990.
	15	Vijay S. Pai , Parthasarathy Ranganathan , Sarita V. Adve , Tracy Harton, An evaluation of memory consistency models for shared-memory systems with ILP processors, Proceedings of the seventh international conference on Architectural support for programming languages and operating systems, p.12-23, October 01-04, 1996, Cambridge, Massachusetts, United States
	16	Dennis Shasha , Marc Snir, Efficient and correct execution of parallel programs that share memory, ACM Transactions on Programming Languages and Systems (TOPLAS), v.10 n.2, p.282-312, April 1988 [doi>10.1145/42190.42277]