Retrospective: the J-machine

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Retrospective: the J-machine

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International Symposium on Computer Architecture archive
25 years of the international symposia on Computer architecture (selected papers) table of contents

Barcelona, Spain

Pages: 54 - 58

Year of Publication: 1998

ISBN:1-58113-058-9

Authors

William J. Dally	Computer Systems Laboratory, Stanford University
Andrew Chien	Department of Computer Science, University of Illinois, Urbana-Champaign
Stuart Fiske	Silicon Graphics Computer, Systems
Waldemar Horwat	Netscape Communications
Richard Lethin	Equator Technologies Consulting
Michael Noakes
Peter Nuth	Hewlett Packard, Laboratories
Ellen Spertus	Department of Computer Science, Mills College
Deborah Wallach	DEC, Western Research Laboratory
D. Scott Wills	Department of Electrical, and Computer Engineering, Georgia Institute of Technology
Andrew Chang	Computer Systems Laboratory, Stanford University
John Keen	Silicon Graphics Computer, Systems

Sponsors

IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 29, Citation Count: 0

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	W. J. Dally , L. Chao , A. Chien , S. Hassoun , W. Horwat , J. Kaplan , P. Song , B. Totty , S. Wills, Architecture of a message-driven processor, Proceedings of the 14th annual international symposium on Computer architecture, p.189-196, June 02-05, 1987, Pittsburgh, Pennsylvania, United States [doi>10.1145/30350.30372]
	2	William J. Dally , J. A. Stuart Fiske , John S. Keen , Richard A. Lethin , Michael D. Noakes , Peter R. Nuth , Roy E. Davison , Gregory A. Fyler, The Message-Driven Processor: A Multicomputer Processing Node with Efficient Mechanisms, IEEE Micro, v.12 n.2, p.23-39, March 1992 [doi>10.1109/40.127581]
	3	William J. Dally, A universal parallel computer architecture, New Generation Computing, v.11 n.3-4, p.227-249, July 1993
	4	W. Horwat , A. A. Chien , W. J. Dally, Experience with CST: programming and implementation, Proceedings of the ACM SIGPLAN 1989 Conference on Programming language design and implementation, p.101-109, June 19-23, 1989, Portland, Oregon, United States
	5	P. M. Kogge , T. Sunaga , H. Miyataka , K. Kitamura , E. Retter, Combined DRAM and logic chip for massively parallel systems, Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95), p.4, March 27-29, 1995
	6	J. Kuskin , D. Ofelt , M. Heinrich , J. Heinlein , R. Simoni , K. Gharachorloo , J. Chapin , D. Nakahira , J. Baxter , M. Horowitz , A. Gupta , M. Rosenblum , J. Hennessy, The Stanford FLASH multiprocessor, Proceedings of the 21ST annual international symposium on Computer architecture, p.302-313, April 18-21, 1994, Chicago, Illinois, United States
	7	Richard A. Lethin , William J. Dally, MDP Design Tools and Methods, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.424-428, October 11-14, 1992
	8	Richard Anton Lethin , William J. Dally, Message-driven dynamics, 1997
	9	Daniel Maskit , Stephen Taylor, A message-driven programming system for fine-grain multicomputers, Software—Practice & Experience, v.24 n.10, p.953-980, Oct. 1994 [doi>10.1002/spe.4380241005]
	10	Michael Noakes , William J. Dally, System design of the J-Machine, Proceedings of the sixth MIT conference on Advanced research in VLSI, p.179-194, March 1990, Boston, Massachusetts, United States
	11	R. S. Nikhil , G. M. Papadopoulos , Arvind, T: a multithreaded massively parallel architecture, Proceedings of the 19th annual international symposium on Computer architecture, p.156-167, May 19-21, 1992, Queensland, Australia
	12	Michael D. Noakes , Deborah A. Wallach , William J. Dally, The J-machine multicomputer: an architectural evaluation, Proceedings of the 20th annual international symposium on Computer architecture, p.224-235, May 16-19, 1993, San Diego, California, United States
	13	David Patterson , Thomas Anderson , Neal Cardwell , Richard Fromm , Kimberly Keeton , Christoforos Kozyrakis , Randi Thomas , Katherine Yelick, A Case for Intelligent RAM, IEEE Micro, v.17 n.2, p.34-44, March 1997 [doi>10.1109/40.592312]
	14	E. Spertus and W. Dally, "Dataflow on a General- Purpose Parallel Computer," ICPP, pp. II231-Ii235, 1991.
	15	Ellen Spertus , Seth Copen Goldstein , Klaus Erik Schauser , Thorsten von Eicken , David E. Culler , William J. Dally, Evaluation of mechanisms for fine-grained parallel programs in the J-machine and the CM-5, Proceedings of the 20th annual international symposium on Computer architecture, p.302-313, May 16-19, 1993, San Diego, California, United States
	16	Thorsten von Eicken , David E. Culler , Seth Copen Goldstein , Klaus Erik Schauser, Active messages: a mechanism for integrated communication and computation, Proceedings of the 19th annual international symposium on Computer architecture, p.256-266, May 19-21, 1992, Queensland, Australia
	17	Yuetsu Kodama , Hirohumi Sakane , Mitsuhisa Sato , Hayato Yamana , Shuichi Sakai , Yoshinori Yamaguchi, The EM-X parallel computer: architecture and basic performance, Proceedings of the 22nd annual international symposium on Computer architecture, p.14-23, June 22-24, 1995, S. Margherita Ligure, Italy
	18	Whay Sing Lee , William J. Dally , Stephen W. Keckler , Nicholas P. Carter , Andrew Chang, An Efficient, Protected Message Interface, Computer, v.31 n.11, p.69-75, November 1998 [doi>10.1109/2.730739]
	19	D. Wallach, PHD: A Hierarchical Cache Coherence Protocol, S.M. Thesis, MIT, 1992.