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Retrospective: implementing precise interrupts in pipelined processors
Full text PdfPdf (118 KB)
Source International Symposium on Computer Architecture archive
25 years of the international symposia on Computer architecture (selected papers) table of contents
Barcelona, Spain
Page: 42  
Year of Publication: 1998
ISBN:1-58113-058-9
Author
James E. Smith  Department of Electrical and Computer Engineering, University of Wisconsin-Madison
Sponsors
IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 12,   Downloads (12 Months): 42,   Citation Count: 0
Additional Information:

index terms   collaborative colleagues  

Tools and Actions: Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/285930.285948
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INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES

Additional Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES

  K. Computing Milieux
  K.2 HISTORY OF COMPUTING
      Subjects: Hardware


General Terms:
Design, Performance, Theory

Collaborative Colleagues:
James E. Smith: colleagues

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