Retrospective: decoupled access/execute architectures

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Retrospective: decoupled access/execute architectures

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International Symposium on Computer Architecture archive
25 years of the international symposia on Computer architecture (selected papers) table of contents

Barcelona, Spain

Pages: 27 - 28

Year of Publication: 1998

ISBN:1-58113-058-9

Author

James E. Smith

Department of Electrical and Computer Engineering, University of Wisconsin-Madison

Sponsors

IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 12, Downloads (12 Months): 28, Citation Count: 0

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	E.U. Cohler and J. E. Storer, "Functionally Parallel Architecture for Array Processors," Computer, vol. 14, no. 9, pp. 28-36, Sept. 1981.
	2	A. R. Pleszkun, A Structured Memory Access Architecture, Computer Systems Group Report CSG-10, Coordinated Science Lab., Univ. of Illinois, Urbana, IL, Oct. 1982.
	3	W.C. Brantley and J. Weiss, "Organization and Architecture Trade-offs in FOM," IEEE Workshop on Computer Systems Organization, New Orleans, pp. 139-143, March 1983.
	4	J. E. Smith and T. J. Kaminski, "Varieties of Decoupled Access/Execute Computer Architectures," 20th Allerton Conference on Communication, Control, and Computing, Monticello, IL, pp. 577-586, Oct. 1982.
	5	J. E. Smith , G. E. Dermer , B. D. Vanderwarn , S. D. Klinger , C. M. Rozewski, The ZS-1 central processor, Proceedings of the second international conference on Architectual support for programming languages and operating systems, p.199-204, October 1987, Palo Alto, California, United States
	6	James E. Smith , Shlomo Weiss , Nicholas Y. Pang, A simulation study of decoupled architecture computers, IEEE Transactions on Computers, v.35 n.8, p.692-702, Aug. 1986 [doi>10.1109/TC.1986.1676820]
	7	J.E. Smith, A. R. Pleszkun, R. H. Katz, and J. R. Goodman, "PIPE: A High Performance VLSI Architecture", IEEE Workshop on Computer Systems Organization, New Orleans, pp. 131-138, March 1983.
	8	J. R. Goodman , Jian-tu Hsieh , Koujuch Liou , Andrew R. Pleszkun , P. B. Schechter , Honesty C. Young, PIPE: a VLSI decoupled architecture, Proceedings of the 12th annual international symposium on Computer architecture, p.20-27, June 17-19, 1985, Boston, Massachusetts, United States