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ABSTRACT
Register files (RF) represent a substantial portion of the energy
budget in modern processors, and are growing rapidly with the trend
towards wider instruction issue. The actual access energy costs
depend greatly on the register file circuitry used. This paper
compares various RF circuitry techniques for their energy ef-
ficiencies, as a function of architectural parameters such as the
number of registers and the number of ports. The Port Priority
Selection technique was found to be the most energy efficient. The
dependence of register file access energy upon technology scaling
is also studied. However, as this paper shows, it appears that none
of these will be enough to prevent centralized register files from
becoming the dominant power component of next-generation
superscalar computers, and alternative methods for
inter-instruction communication need to be developed. Split
register file architecture is analyzed as a possible alternative.
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