Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks

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Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1998 international symposium on Low power electronics and design table of contents

Monterey, California, United States

Pages: 239 - 244

Year of Publication: 1998

ISBN:1-58113-059-7

Authors

Zhanping Chen	School of Electrical and Computer Engineering, Purdue Univ., W. Lafa yette, IN
Mark Johnson	School of Electrical and Computer Engineering, Purdue Univ., W. Lafa yette, IN
Liqiong Wei	School of Electrical and Computer Engineering, Purdue Univ., W. Lafa yette, IN
Kaushik Roy	School of Electrical and Computer Engineering, Purdue Univ., W. Lafa yette, IN

Sponsors

IEEE-SSCS : Solid Stat Circuits Council
SIGDA: ACM Special Interest Group on Design Automation
IEEE-EDS : Electronic Devices Society
IEEE-CAS : Circuits & Systems

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 27, Downloads (12 Months): 123, Citation Count: 54

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abstract references cited by index terms collaborative colleagues

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ABSTRACT

Low supply voltage requires the device threshold to be reduced in order to maintain performance. Due to the exponential relationship between leakage current and threshold voltage in the weak inversion region, leakage power can no longer be ignored. In this paper we present a technique to accurately estimate leakage power by accurately modeling the leakage current in transistor stacks. The standby leakage current model has been verified by IISPICE. We demonstrate that the dependence of leakage power on primary input combinations can be accounted for by this model. Based on our analysis we can determine good bounds for leakage power in the standby mode. As a by-product of this analysis, we can also determine the set of input vectors which can put the circuits in the low-power standby mode. Results on a large number of benchmarks indicate that proper input selection can reduce the standby leakage power by more than 50% for some circuits.

REFERENCES

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