| The petrol approach to high-level power estimation |
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International Symposium on Low Power Electronics and Design
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Proceedings of the 1998 international symposium on Low power electronics and design
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Monterey, California, United States
Pages: 130 - 132
Year of Publication: 1998
ISBN:1-58113-059-7
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Authors
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Rafael Peset Llopis
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Philips Research Laboraatories, Prof. Holstlaan 4, WAY 4-1, 5656 AA Eindhoven, The Netherlands
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Kees Goossens
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Philips Research Laboraatories, Prof. Holstlaan 4, WAY 4-1, 5656 AA Eindhoven, The Netherlands
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Downloads (6 Weeks): 3, Downloads (12 Months): 6, Citation Count: 5
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ABSTRACT
High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-level power estimation approaches limits their use. In this paper we present a novel, more general and flexible high-level power estimation approach, that avoids these limitations. Petrol, as we call it, is not limited to specialized application domains, synthesizable VHDL, or data path parts of a design. We show that glitches can be usefully modeled at higher levels of abstraction. The Petrol approach shows good correlation with gate-level power estimates. It is currently used for commercial designs.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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D. Marculescu et. al., "Information Theoretic Measures for Power Analysis", IEEE Trans. on CAD, jun. 96, pp. 559- 610.
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R. Mehra and J. Rabaey, "Behavioral Level Power Estimation and Exploration", Proc. Int. Workshop on Low Power Des., Apr.94, pp. 197-202.
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M. Nemani and F.N. Najm, "Towards a High-Level Power Estimation Capability", IEEE Trans. on CAD, Jun. 96, pp. 588-598.
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R. Peset Llopis, "A New Approach in High-Level Power Estimation", Proc. DATE 98 Des. Track, pp. 31-35.
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Power Compiler of Synopsys.
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