Automatic characterization and modeling of power consumption in static RAMs

ABSTRACT

An automatic modeling technique is presented in this paper that allows to build an accurate model of power consumption in embedded memory blocks. A software neural-network is used to create a regression tree by automatically splitting those variables that have a discontinuous effect on the power consumption. An application of the methodology to the modeling of a 0.35µm CMOS embedded SRAM is presented.

REFERENCES

• 1: Design Power. "Synopsys Power Product Reference v1997.01", Synopsys Inc., Mountain View, CA.
• 2: D.Liu and C. Svensson, "Power Consumption Estimation in CMOS VLSI Chips", IEEE Journal of Solid State Circuits, Vol. 29, No. 6, June 1994
• 3: R. J. Evans, P. D. Franzon, "Energy Consumption Modeling and Optimization for SRAM's", IEEE Journal of Solid State Circuits, Vol. 30, No. 5, May 1995
• 4: K. Ogawa , M. Kohno , F. Kitamura, PASTEL: a parameterized memory characterization system, Proceedings of the conference on Design, automation and test in Europe, p.15-21, February 23-26, 1998, Le Palais des Congrés de Paris, France
• 5: L. Benini, A. Bogliolo, M. Favalli and G. De Micheli, "Regression models for behavioral power estimation", Proceedings of PATMOS 96, pp. 179-187, September 1996
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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Memory technologies

Additional Classification:
  B. Hardware
  B.8 Performance and Reliability

  C. Computer Systems Organization

  J. Computer Applications
  J.2 PHYSICAL SCIENCES AND ENGINEERING
      Subjects: Electronics

General Terms:
Design, Measurement, Performance, Theory

Keywords:
memory modeling, power estimation, static RAMs