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Accurate indirect branch prediction
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Source International Symposium on Computer Architecture archive
Proceedings of the 25th annual international symposium on Computer architecture table of contents
Barcelona, Spain
Pages: 167 - 178  
Year of Publication: 1998
ISBN:0-8186-8491-7
Also published in ...
Authors
Karel Driesen  Department of Computer Science, University of California, Santa Barbara, CA
Urs Hölzle  Department of Computer Science, University of California, Santa Barbara, CA
Sponsors
IEEE-CS\TCCA : TC on Computer Arhitecture
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
IEEE Computer Society  Washington, DC, USA
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Downloads (6 Weeks): 28,   Downloads (12 Months): 70,   Citation Count: 17
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ABSTRACT

Indirect branch prediction is likely to become increasingly important in the future because indirect branches occur more frequently in object-oriented programs. With misprediction rates of around 25% on current processors, indirect branches can incur a significant fraction of branch misprediction overhead even though they remain less frequent than the more predictable conditional branches. We investigate a wide range of two-level predictors dedicated exclusively to indirect branches. Starting with predictors that use full-precision addresses and unlimited tables, we progressively introduce hardware constraints and minimize the loss of predictor performance at each step. For programs from the SPECint95 suite as well as a suite of large C++ applications, a two-level predictor achieves a misprediction rate of 9.8% with a 1K-entry table and 7.3% with an 8K-entry table, representing more than a threefold improvement over an ideal BTB. A hybrid predictor further reduces the misprediction rates to 8.98% (1K) and 5.95% (8K).


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
AH96
 
CGZ94
Brad Calder, Dirk Grunwald, and Benjamin Zorn. Quantifying Behavioral Differences Between C and C++ Programs. Technical Report CU-CS-698-94, University of Colorado, Boulder, January 1994.
CG94
CHP94
 
CHP95
CHP97
 
CK93
D+96
DH96
 
DH97
EG97
ECP96
 
Intel97
Intel press release. The Next Generation of Microprocessor Architecture: A 64-bit instruction Set Architecture (ISA) Based on EPIC Technology. Intel Corporation October 1997 (http://www.intel.com/pressroom/archive/ backgrnd/sp 101497.HTM)
 
J+96
KE91
 
LS84
J. Lee and A. Smith. Branch prediction strategies and branch target buffer design. IEEE Computer 17(1), January 1984.
 
Nair95
M+94
 
MMN93
 
McFar93
S. McFarling, Combining Branch Predictors, WRL Technical Note TN-36, Digital Equipment Corporation, June 1993
 
P+97
 
SLM95
 
USS97
 
YP91
Tse-Yu Yeh and Yale N. Patt. Two-level adaptive branch prediction. MICRO 24, November 1991.
YP93

CITED BY  17

Collaborative Colleagues:
Karel Driesen: colleagues
Urs Hölzle: colleagues