| Performance characterization of a Quad Pentium Pro SMP using OLTP workloads |
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International Symposium on Computer Architecture
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Proceedings of the 25th annual international symposium on Computer architecture
table of contents
Barcelona, Spain
Pages: 15 - 26
Year of Publication: 1998
ISBN:0-8186-8491-7
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Authors
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Kimberly Keeton
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Computer Science Division, University of California at Berkeley, 387 Soda Hall #1776, Berkeley, CA
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David A. Patterson
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Computer Science Division, University of California at Berkeley, 387 Soda Hall #1776, Berkeley, CA
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Yong Qiang He
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Informix Software, Inc., 4100 Bohannon Drive, Menlo Park, CA
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Roger C. Raphael
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Informix Software, Inc., 4100 Bohannon Drive, Menlo Park, CA
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Walter E. Baker
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Informix Software, Inc., 4100 Bohannon Drive, Menlo Park, CA
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IEEE Computer Society
Washington, DC, USA
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Downloads (6 Weeks): 11, Downloads (12 Months): 30, Citation Count: 60
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ABSTRACT
Commercial applications are an important, yet often overlooked, workload with significantly different characteristics from technical workloads. The potential impact of these differences is that computers optimized for technical workloads may not provide good performance for commercial applications, and these applications may not fully exploit advances in processor design. To evaluate these issues, we use hardware counters to measure architectural features of a four-processor Pentium Pro-based server running a TPC-C-like workload on an Informix database. We examine the effectiveness of out-of-order execution, branch prediction, speculative execution, superscalar issue and retire, caching and multiprocessor scaling. We find that out-of-order execution, superscalar issue and retire, and branch prediction are not as effective for database workloads as they are for technical workloads, such as SPEC. We find that caches are effective at reducing processor traffic to memory; even larger caches would be helpful to satisfy more data requests. Multiprocessor scaling of this workload is good, but even modest bus utilization degrades application memory latency, limiting database throughput.
REFERENCES
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CITED BY 60
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Luiz André Barroso , Kourosh Gharachorloo , Robert McNamara , Andreas Nowatzyk , Shaz Qadeer , Barton Sano , Scott Smith , Robert Stets , Ben Verghese, Piranha: a scalable architecture based on single-chip multiprocessing, ACM SIGARCH Computer Architecture News, v.28 n.2, p.282-293, May 2000
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Alex Ramirez , Luiz André Barroso , Kourosh Gharachorloo , Robert Cohn , Josep Larriba-Pey , P. Geoffrey Lowney , Mateo Valero, Code layout optimizations for transaction processing workloads, ACM SIGARCH Computer Architecture News, v.29 n.2, p.155-164, May 2001
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Heidi Scott , Patrick Martin , Berni Schiefer, A study of the impact of direct access I/O on relational database management systems, Proceedings of the 2002 conference of the Centre for Advanced Studies on Collaborative research, p.10, September 30-October 03, 2002, Toronto, Ontario, Canada
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Minglong Shao , Anastassia Ailamaki , Babak Falsafi, DBmbench: fast and accurate database workload representation on modern microarchitecture, Proceedings of the 2005 conference of the Centre for Advanced Studies on Collaborative research, p.254-267, October 17-20, 2005, Toranto, Ontario, Canada
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Murali Annavaram , Ryan Rakvic , Marzia Polito , Jean-Yves Bouguet , Richard A. Hankins , Bob Davies, The Fuzzy Correlation between Code and Performance Predictability, Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture, p.93-104, December 04-08, 2004, Portland, Oregon
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Stefan Manegold , Peter Boncz , Niels Nes , Martin Kersten, Cache-conscious radix-decluster projections, Proceedings of the Thirtieth international conference on Very large data bases, p.684-695, August 31-September 03, 2004, Toronto, Canada
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Richard A. Hankins , Trung Diep , Murali Annavaram , Brian Hirano , Harald Eri , Hubert Nueckel , John P. Shen, Scaling and Charact rizing Database Workloads: Bridging the Gap between Research and Practice, Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, p.151, December 03-05, 2003
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