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Shared memory implementation of a parallel switch-level circuit simulator
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Source Workshop on Parallel and Distributed Simulation archive
Proceedings of the twelfth workshop on Parallel and distributed simulation table of contents
Banff, Alberta, Canada
Pages: 134 - 141  
Year of Publication: 1998
ISBN:0-8186-8457-7
Also published in ...
Authors
Yu-an Chen  Computer Science Department, University of California at Los Angeles, Los Angeles, CA
Rajive Bagrodia  Computer Science Department, University of California at Los Angeles, Los Angeles, CA
Sponsors
SIGSIM: ACM Special Interest Group on Simulation and Modeling
SCS : Society for Computer Simulation
IEEE-CS\TCSIM : TC on Simulation
Publisher
IEEE Computer Society  Washington, DC, USA
Bibliometrics
Downloads (6 Weeks): 5,   Downloads (12 Months): 19,   Citation Count: 7
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Jeffrey M. Arnold. Parallel simulation of digital circuits. MIT/LCS/TR-333, Computer Science Department, MIT, Cambridge, MA, February 1985.
 
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K.M. Chandy and R. Sherman. The conditional event approach to distributed simulation. In Distributed Simulation Conference, Miami, 1989.
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Jack Vedder Briner, Jr. Parallel Mixed-Level Simulation of Digital Circuits Using Virtual Time. Ph.d. thesis, Duke University, August 1990.
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Stig Kofoed. Portable multitasking in c. Dr. Dobb's Journal, December 1995.
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Larry Soule and Anoop Gupta. An evaluation of the Chandy-Misra-Bryant algorithm for digital logic simulation. In Proceedings o} the 6th Workshop on Parallel and Distributed Simulation, SCS, pages 129-1:t8, Newport Beach, CA, January 1992.
 
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Christopher J. Terman. Rsim- a logic-level timing simulator. In Proceedings of the IEEE Intl. Conf. on Computer-Aided Design, pages 437-440, October 1983.

CITED BY  7

Collaborative Colleagues:
Yu-an Chen: colleagues
Rajive Bagrodia: colleagues