| The potential of data value speculation to boost ILP |
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International Conference on Supercomputing
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Proceedings of the 12th international conference on Supercomputing
table of contents
Melbourne, Australia
Pages: 21 - 28
Year of Publication: 1998
ISBN:0-89791-998-X
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Downloads (6 Weeks): 2, Downloads (12 Months): 23, Citation Count: 14
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Michael Butler , Tse-Yu Yeh , Yale Patt , Mitch Alsup , Hunter Scales , Michael Shebanow, Single instruction stream parallelism is greater than two, Proceedings of the 18th annual international symposium on Computer architecture, p.276-286, May 27-30, 1991, Toronto, Ontario, Canada
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F. Gabbay and A. Mendelson. "Speculative Execution Based on Value Prediction". Technical Report, Technion, 1997.
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J. Gonzfilez and A. Gonzfilez. "Limits of Instruction Level Parallelism with Data Speculation". Technical Report #UPC-DAC- 1997-34, 1997.
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Mikko H. Lipasti , Christopher B. Wilkerson , John Paul Shen, Value locality and load value prediction, Proceedings of the seventh international conference on Architectural support for programming languages and operating systems, p.138-147, October 01-04, 1996, Cambridge, Massachusetts, United States
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S. McFarling. "Combining Branch Predictors". Digital Western Research Lab Technical Note TN-36, 1993
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Y. Sazeides and J.E. Smith. "Implementations of Context Based Value Predictors". Technical Report #ECE-TR-97- 8, University of Wisconsin-Madison, 1997.
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M. D. Smith , M. Johnson , M. A. Horowitz, Limits on multiple instruction issue, Proceedings of the third international conference on Architectural support for programming languages and operating systems, p.290-302, April 03-06, 1989, Boston, Massachusetts, United States
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R.M. Tomasulo, "An Efficient Algorithm for Exploiting Multiple Arithmetic Units", IBM Journal of Research and Development, 11 (1), pp. 25-33, Jan. 1967.
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Kevin B. Theobald , Guang R. Gao , Laurie J. Hendren, On the limits of program parallelism and its smoothability, Proceedings of the 25th annual international symposium on Microarchitecture, p.10-19, December 01-04, 1992, Portland, Oregon, United States
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D.W. Wall. "Limits of Instruction-Level Parallelism" Technical Report WRL 93/6 Digital Western Research Laboratory, 1993.
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