What's between simulation and formal verification? (extended abstract)

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What's between simulation and formal verification? (extended abstract)

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 35th annual Design Automation Conference table of contents

San Francisco, California, United States

Pages: 328 - 329

Year of Publication: 1998

ISBN:0-89791-964-5

Author

David L. Dill

Stanford University

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
IEEE-CS : Computer Society

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 34, Citation Count: 10

Additional Information:

abstract cited by index terms collaborative colleagues

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ABSTRACT

This embedded tutorial surveys some possibilities for verification techniques that combine conventional simulation and ideas, techniques, and algorithms from formal verification, to obtain better functional test coverage of large designs.

CITED BY 10

	Malay K. Ganai , Adnan Aziz , Andreas Kuehlmann, Enhancing simulation with BDDs and ATPG, Proceedings of the 36th ACM/IEEE conference on Design automation, p.385-390, June 21-25, 1999, New Orleans, Louisiana, United States
	K. Hering , J. Löser , J. Markwardt, dibSIM: a parallel functional logic simulator allowing dynamic load balancing, Proceedings of the conference on Design, automation and test in Europe, p.472-478, March 2001, Munich, Germany
	Mike Benjamin , Daniel Geist , Alan Hartman , Gerard Mas , Ralph Smeets , Yaron Wolfsthal, A study in coverage-driven test generation, Proceedings of the 36th ACM/IEEE conference on Design automation, p.970-975, June 21-25, 1999, New Orleans, Louisiana, United States
	Leila Barakatain , Sofiène Tahar , Jean Lamarche , Jean-Marc Gendreau, Practical approaches to the verification of a telecom megacell using FormalCheck, Proceedings of the 11th Great Lakes symposium on VLSI, p.1-6, March 2001, West Lafayette, Indiana, United States
	C. Richard Ho , Michael Theobald , Martin M. Deneroff , Ron O. Dror , Joseph Gagliardo , David E. Shaw, Early formal verification of conditional coverage points to identify intrinsically hard-to-verify logic, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California
	Malay Ganai , Praveen Yalagandula , Adnan Aziz , Andreas Kuehlmann , Vigyan Singhal, SIVA: A System for Coverage-Directed State Space Search, Journal of Electronic Testing: Theory and Applications, v.17 n.1, p.11-27, February 2001
	Yasushi Umezawa , Takeshi Shimizu, A Formal Verification Methodology for Checking Data Integrity, Proceedings of the conference on Design, Automation and Test in Europe, p.284-289, March 07-11, 2005
	Hana Chockler , Joseph Y. Halpern , Orna Kupferman, What causes a system to satisfy a specification?, ACM Transactions on Computational Logic (TOCL), v.9 n.3, p.1-26, June 2008
	Younes Lahbib , Meriam Kallel , Ayoub Dhouib , Maher Hechkel , Antoine Perrin , Rached Tourki, System on Chips optimization using ABV and automatic generation of SystemC codes, Microprocessors & Microsystems, v.31 n.7, p.433-444, November, 2007
	Jayanta Bhadra , Magdy S. Abadir , Li-C. Wang , Sandip Ray, A Survey of Hybrid Techniques for Functional Verification, IEEE Design & Test, v.24 n.2, p.112-122, March 2007

INDEX TERMS

Primary Classification:
J. Computer Applications

Additional Classification:
B. Hardware
B.8 Performance and Reliability

C. Computer Systems Organization

General Terms:
Design, Performance, Theory, Verification

Collaborative Colleagues:

David L. Dill: colleagues

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