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GART (abstract): a new, flexible placement and routing tool for research on FPGA architectures
Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays table of contents
Monterey, California, United States
Page: 257  
Year of Publication: 1998
ISBN:0-89791-978-5
Authors
J. Depreitere
H. Van Marck
J. Van Campenhout
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Placement and routing
  B.8 Performance and Reliability

  G. Mathematics of Computing
  G.1 NUMERICAL ANALYSIS
      G.1.6 Optimization
          Subjects: Simulated annealing


General Terms:
Algorithms, Design, Performance

Collaborative Colleagues:
J. Depreitere: colleagues
H. Van Marck: colleagues
J. Van Campenhout: colleagues

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