Estimation of maximum current envelope for power bus analysis and design

ABSTRACT

In this p ap er we pr esent an inputpattern independent method to compute the maximum current envelope, which is an upper bound over all possible curr ent waveforms drawn by a circuit. The maximum current envelope can be used to compute the worst-c ase RMS current and average cur rent dr awn by a set of gates. These current values can be used in the design of the p ower bus to ensure that the power bus interconne cts are not susc eptible to ele ctromigration (EM) induced failur e. We also present comparisons with exhaustive/long simulations for MCNC/ISCAS-85 benchmark circuits to verify the accuracy of the method.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.8 Performance and Reliability

Additional Classification:
  B. Hardware
  B.6 LOGIC DESIGN
  B.7 INTEGRATED CIRCUITS
  B.8 Performance and Reliability

General Terms:
Algorithms, Design, Reliability