| IES3: a fast integral equation solver for efficient 3-dimensional extraction |
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International Conference on Computer Aided Design
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Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
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San Jose, California, United States
Pages: 448 - 455
Year of Publication: 1997
ISBN:0-8186-8200-0
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Authors
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Sharad Kapur
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Bell Laboratories, Lucent Technologies, Murray Hill, NJ
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David E. Long
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Bell Laboratories, Lucent Technologies, Murray Hill, NJ
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IEEE Computer Society
Washington, DC, USA
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| Bibliometrics |
Downloads (6 Weeks): 4, Downloads (12 Months): 24, Citation Count: 29
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ABSTRACT
Integral equation techniques are often used to extract models of integrated circuit structures. This extraction involves solving a dense system of linear equations, and using direct solution methods is prohibitive for large problems. In this paper, we present IES/sup 3/ (pronounced "ice cube"), a fast Integral Equation Solver for three-dimensional problems with arbitrary kernels. Extraction methods based on IES/sup 3/ are substantially more efficient than existing multipole-based approaches.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 29
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Weiping Shi , Jianguo Liu , Naveen Kakani , Tiejun Yu, A fast hierarchical algorithm for 3-D capacitance extraction, Proceedings of the 35th annual conference on Design automation, p.212-217, June 15-19, 1998, San Francisco, California, United States
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Jinsong Zhao , Wayne W. M. Dai , Sharad Kapur , David E. Long, Efficient thee-dimensional extraction based on static and full-wave layered Green's functions, Proceedings of the 35th annual conference on Design automation, p.224-229, June 15-19, 1998, San Francisco, California, United States
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Joe Kanapka , Joel Phillips , Jacob White, Fast methods for extraction and sparsification of substrate coupling, Proceedings of the 37th conference on Design automation, p.738-743, June 05-09, 2000, Los Angeles, California, United States
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Al Dunlop , Alper Demir , Peter Feldmann , Sharad Kapur , David Long , Robert Melville , Jaijeet Roychowdhury, Tools and methodology for RF IC design, Proceedings of the 35th annual conference on Design automation, p.414-420, June 15-19, 1998, San Francisco, California, United States
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Chuanyi Yang , Swagato Chakraborty , Dipanjan Gope , Vikram Jandhyala, A parallel low-rank multilevel matrix compression algorithm for parasitic extraction of electrically large structures, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
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Xiaoji Ye , Peng Li , Min Zhao , Rajendran Panda , Jiang Hu, Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding, Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, November 05-08, 2007, San Jose, California
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Rong Jiang , Wenyin Fu , J. M. Wang , V. Lin , C. C. -P. Chen, Efficient statistical capacitance variability modeling with orthogonal principle factor analysis, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.683-690, November 06-10, 2005, San Jose, CA
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INDEX TERMS
Primary Classification:
G.
Mathematics of Computing
G.1
NUMERICAL ANALYSIS
Additional Classification:
B.
Hardware
B.7
INTEGRATED CIRCUITS
B.7.1
Types and Design Styles
Subjects:
Advanced technologies
E.
Data
E.4
CODING AND INFORMATION THEORY
Subjects:
Data compaction and compression
F.
Theory of Computation
F.2
ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY
F.2.1
Numerical Algorithms and Problems
Subjects:
Computations on matrices
G.
Mathematics of Computing
G.4
MATHEMATICAL SOFTWARE
Subjects:
Algorithm design and analysis
General Terms:
Algorithms,
Design,
Experimentation,
Measurement,
Performance,
Theory
Keywords:
3-dimensional extraction,
IES/sup 3/,
arbitrary kernels,
circuit CAD,
integral equation solver,
integrated circuit structures
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