DSP address optimization using a minimum cost circulation technique

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DSP address optimization using a minimum cost circulation technique

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International Conference on Computer Aided Design archive
Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California, United States

Pages: 100 - 103

Year of Publication: 1997

ISBN:0-8186-8200-0

Author

Catherine Gebotys

Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Ont N2L 3G1 Canada

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society

Publisher

IEEE Computer Society Washington, DC, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 19, Citation Count: 12

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ABSTRACT

This paper presents a new approach to solving the DSP address assignment problem. A minimum cost circulation approach is used to efficiently generate high performance addressing code in polynomial time. Addressing code size improvements of up to 7 times are obtained, accounting for up to 1.6 times improvement in code size and performance of compiler-generated DSP code. Results also show that memory layout has a small effect on code size and performance when optimal addressing is used. This research is important for industry since this value-added technique can improve code size, power dissipation and performance, without increasing cost.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 12

	Guido Araujo , Guilherme Ottoni , Marcelo Cintra, Global array reference allocation, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.7 n.2, p.336-357, April 2002
	Sathishkumar Udayanarayanan , Chaitali Chakrabarti, Address code generation for digital signal processors, Proceedings of the 38th conference on Design automation, p.353-358, June 2001, Las Vegas, Nevada, United States
	M. Miranda , C. Ghez , C. Kulkarni , F. Catthoor , D. Verkest, Systematic speed-power memory data-layout exploration for cache controlled embedded multimedia applications, Proceedings of the 14th international symposium on Systems synthesis, September 30-October 03, 2001, Montréal, P.Q., Canada
	Catherine H. Gebotys , Robert J. Gebotys, An empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors, Proceedings of the 1998 international symposium on Low power electronics and design, p.121-123, August 10-12, 1998, Monterey, California, United States
	Rainer Leupers , Fabian David, A uniform optimization technique for offset assignment problems, Proceedings of the 11th international symposium on System synthesis, p.3-8, December 02-04, 1998, Hsinchu, Taiwan, China
	Catherine H. Gebotys, An efficient model for DSP code generation: performance, code size, estimated energy, Proceedings of the 10th international symposium on System synthesis, p.41-47, September 17-19, 1997, Antwerp, Belgium
	Ashok Sudarsanam , Sharad Malik , Masahiro Fujita, A retargetable compilation methodology for embedded digital signal processors using a machine-dependent code optimizaton library, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	J.-Y. Lee , I.-C. Park, Address code generation for DSP instruction-set architectures, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.8 n.3, p.384-395, July 2003
	Xiaotong Zhuang , ChokSheak Lau , Santosh Pande, Storage assignment optimizations through variable coalescence for embedded processors, ACM SIGPLAN Notices, v.38 n.7, July 2003
	Yoonseo Choi , Taewhan Kim, Address assignment combined with scheduling in DSP code generation, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Guilin Chen , Mahmut Kandemir, Optimizing Address Code Generation for Array-Intensive DSP Applications, Proceedings of the international symposium on Code generation and optimization, p.141-152, March 20-23, 2005
	M. Palkovic , M. Miranda , K. Denolf , P. Vos , F. Catthoor, Systematic Address and Control Code Transformations for Performance Optimisation of a MPEG-4 Video Decoder, Proceedings of the 2002 conference on Asia South Pacific design automation/VLSI Design, p.547, January 07-11, 2002