Designing high performance CMOS microprocessors using full custom techniques

ABSTRACT

In this paper, we describe a full customCMOS design methodology and supporting CADtechnologies used to develop ALPHA and StrongARMmicroprocessors at Digital Semiconductor. The paper issubdivided into four parts, starting with a description ofthe design methodology and general CAD flows.Additional sections focus on two particular areas ofinterest: high performance low-power and full customdesign benefits and verification issues.

REFERENCES

• 1: J. Montanaro, R. Witek, K. Anne, A. Black, E. Cooper, D. Dobberpuhl, P. Donahue, J. Eno, G. Hoeppner, D. Kruckemyer, T. Lee, P. Lin, L. Madden, D. Murray, M. Pearce, S. Santhanam, K. Snyder, R. Stephany, S. Thierauf, "A 160MHz 32b 0.5W CMOS RISC Microprocessor," ISSCC Digest of Technical Papers, pp. 214-215, Feb., 1996.
• 2: D. Dobberpuhl, et. al., "A 200MHz 64b Dual-Issue CMOS Microprocessor," IEEE Journal of Solid State Circuits, vol. 27, no. 11, Nov., 1992.
• 3: P. Gronowski, et. al., "A 433Mhz 64b Quad-Issue CMOS RISC Microprocessor," ISSCC Digest of Technical Papers, pp. 222-223, Feb., 1996.
• 4: B. Gieseke, et. al., "A 600mhz Superscalar RISC Microprocessor With Out-of-Order Execution," ISSCC Digest of Technical Papers, pp. 176-177, Feb., 1997.
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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Memory technologies

Additional Classification:
  C. Computer Systems Organization

  J. Computer Applications

General Terms:
Design, Measurement, Performance, Theory, Verification