| Multilevel circuit partitioning |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 34th annual Design Automation Conference
table of contents
Anaheim, California, United States
Pages: 530 - 533
Year of Publication: 1997
ISBN:0-89791-920-3
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Authors
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Charles J. Alpert
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UCLA Computer Science Department, Los Angeles, CA and IBM Austin Research Laboratory, Austin, TX
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Jen-Hsin Huang
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UCLA Computer Science Department, Los Angeles, CA and Synopsys, Inc., Mountain View, CA
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Andrew B. Kahng
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UCLA Computer Science Department, Los Angeles, CA and Cadence Design Systems, Inc., San Jose, CA
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Downloads (6 Weeks): 4, Downloads (12 Months): 26, Citation Count: 52
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ABSTRACT
Recent work has illustrated the promise ofmultilevel approaches for partitioning large circuits. Multilevel partitioningrecursively clusters the instance until its size is smallerthan a given threshold, then unclusters the instance while applyinga partitioning refinement algorithm. Our multilevel partitioner usesa new technique to control the number of levels in the matching-basedclustering phase and also exploits recent innovations in classiciterative partitioning. Our heuristic outperforms numerousexisting bipartitioning heuristics, with improvements rangingfrom 6.9 to 27.9% for 100 runs and 3.0 to 20.6% for just 10 runs(while also using less CPU time).
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Lung-Tien Liu , Ming-Ter Kuo , Shih-Chen Huang , Chung-Kuan Cheng, A gradient method on the initial partition of Fiduccia-Mattheyses algorithm, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.229-234, November 05-09, 1995, San Jose, California, United States
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[doi> 10.1145/196244.196602]
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CITED BY 52
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C. J. Alpert , T. Chan , D. J.-H. Huang , I. Markov , K. Yan, Quadratic placement revisited, Proceedings of the 34th annual conference on Design automation, p.752-757, June 09-13, 1997, Anaheim, California, United States
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Andrew E. Caldwell , Andrew B. Kahng , Igor L. Markov, Can recursive bisection alone produce routable placements?, Proceedings of the 37th conference on Design automation, p.477-482, June 05-09, 2000, Los Angeles, California, United States
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Andrew E. Caldwell , Andrew B. Kahng , Igor L. Markov, Hypergraph partitioning with fixed vertices, Proceedings of the 36th ACM/IEEE conference on Design automation, p.355-359, June 21-25, 1999, New Orleans, Louisiana, United States
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C. J. Alpert , A. E. Caldwell , A. B. Kahng , I. L. Markov, Partitioning with terminals: a “new” problem and new benchmarks, Proceedings of the 1999 international symposium on Physical design, p.151-157, April 12-14, 1999, Monterey, California, United States
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Jason Cong , Honching Peter Li , Sung Kyu Lim , Toshiyuki Shibuya , Dongmin Xu, Large scale circuit partitioning with loose/stable net removal and signal flow based clustering, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.441-446, November 09-13, 1997, San Jose, California, United States
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Jason Y. Zien , Pak K. Chan , Martine Schlag, Hybrid spectral/iterative partitioning, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.436-440, November 09-13, 1997, San Jose, California, United States
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A. E. Caldwell , A. B. Kahng , I. L. Markov, Optimal partitioners and end-case placers for standard-cell layout, Proceedings of the 1999 international symposium on Physical design, p.90-96, April 12-14, 1999, Monterey, California, United States
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Wilm Donath , Prabhakar Kudva , Leon Stok , Lakshmi Reddy , Andrew Sullivan , Kanad Chakraborty , Paul Villarrubia, Transformational placement and synthesis, Proceedings of the conference on Design, automation and test in Europe, p.194-201, March 27-30, 2000, Paris, France
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Saurabh N. Adya , Mehmet C. Yildiz , Igor L. Markov , Paul G. Villarrubia , Phiroze N. Parakh , Patrick H. Madden, Benchmarking for large-scale placement and beyond, Proceedings of the 2003 international symposium on Physical design, April 06-09, 2003, Monterey, CA, USA
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Andrew E. Caldwell , Andrew B. Kahng , Andrew A. Kennings , Igor L. Markov, Hypergraph partitioning for VLSI CAD: methodology for heuristic development, experimentation and reporting, Proceedings of the 36th ACM/IEEE conference on Design automation, p.349-354, June 21-25, 1999, New Orleans, Louisiana, United States
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Charles Alpert , Andrew Kahng , Gi-Joon Nam , Sherief Reda , Paul Villarrubia, A semi-persistent clustering technique for VLSI circuit placement, Proceedings of the 2005 international symposium on Physical design, April 03-06, 2005, San Francisco, California, USA
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Navaratnasothie Selvakkumaran , Abhishek Ranjan , Salil Raje , George Karypis, Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
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A. B. Kahng , S. Reda , Qinke Wang, Architecture and details of a high quality, large-scale analytical placer, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.891-898, November 06-10, 2005, San Jose, CA
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