| Power-conscious high level synthesis using loop folding |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 34th annual Design Automation Conference
table of contents
Anaheim, California, United States
Pages: 441 - 445
Year of Publication: 1997
ISBN:0-89791-920-3
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Authors
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Daehong Kim
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School of Electrical Engineering, Seoul National University, Seoul, Korea, 151-742
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Kiyoung Choi
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School of Electrical Engineering, Seoul National University, Seoul, Korea, 151-742
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Downloads (6 Weeks): 2, Downloads (12 Months): 12, Citation Count: 6
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ABSTRACT
In this paper, a transformation technique, called power-consciousloop folding is proposed for high level synthesis of alow power system. Our work is focused on reducing the powerconsumed by functional units through the decrease of switchingactivity in a data path dominated circuit containing loops. Thetransformation algorithm has been implemented and integratedinto a high level synthesis system for experiments. In ourexperiments, we could achieve power reduction of up to 50% forcircuits dominated by functional units.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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