| Low energy memory and register allocation using network flow |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 34th annual Design Automation Conference
table of contents
Anaheim, California, United States
Pages: 435 - 440
Year of Publication: 1997
ISBN:0-89791-920-3
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Author
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Catherine H. Gebotys
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Department of Electrical & Computer Engineering, University of Waterloo, Waterloo, Ontario, N2L 3G1 Canada
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Downloads (6 Weeks): 1, Downloads (12 Months): 20, Citation Count: 21
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ABSTRACT
This paper presents for the first time low energy simultaneousmemory and register allocation. A minimum cost network flowapproach is used to efficiently solve for minimum energy dissipationsolutions in polynomial time. Results show that estimatedenergy improvements of 1.4 to 2.5 times over previous researchare obtained. This research is important for industry since energydissipation is minimized without requiring an increase in cost.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 21
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Yumin Zhang , Xiaobo (Sharon) Hu , Danny Z. Chen, Global register allocation for minimizing energy consumption, Proceedings of the 1999 international symposium on Low power electronics and design, p.100-102, August 16-17, 1999, San Diego, California, United States
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Eren Kursun , Ankur Srivastava , Seda Ogrenci Memik , Majid Sarrafzadeh, Early evaluation techniques for low power binding, Proceedings of the 2002 international symposium on Low power electronics and design, August 12-14, 2002, Monterey, California, USA
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Nikolaos Bellas Ibrahim Hajj , George Stamoulis , N. Bellas , C. Polychronopoulos, Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors, Proceedings of the 1998 international symposium on Low power electronics and design, p.70-75, August 10-12, 1998, Monterey, California, United States
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I. Kadayif , M. Kandemir , G. Chen , N. Vijaykrishnan , M. J. Irwin , A. Sivasubramaniam, Compiler-directed high-level energy estimation and optimization, ACM Transactions on Embedded Computing Systems (TECS), v.4 n.4, p.819-850, November 2005
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Gwénolé Corre , Eric Senn , Nathalie Julien , Eric Martin, A memory aware behavioral synthesis tool for real-time VLSI circuits, Proceedings of the 14th ACM Great Lakes symposium on VLSI, April 26-28, 2004, Boston, MA, USA
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Russell Tessier , Vaughn Betz , David Neto , Thiagaraja Gopalsamy, Power-aware RAM mapping for FPGA embedded memory blocks, Proceedings of the internation symposium on Field programmable gate arrays, February 22-24, 2006, Monterey, California, USA
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