| Statistical estimation of average power dissipation in sequential circuits |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 34th annual Design Automation Conference
table of contents
Anaheim, California, United States
Pages: 377 - 382
Year of Publication: 1997
ISBN:0-89791-920-3
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Authors
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Li-Pen Yuan
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Dept. of ECE and Coordinated Science Lab., Univ. of Illinois at Urbana-Champaign, 1308 W. Main St., Urbana, IL
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Chin-Chi Teng
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Avant! Corporation, 1208 E. Arques Ave., Sunnyvale, CA
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Sung-Mo Kang
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Dept. of ECE and Coordinated Science Lab., Univ. of Illinois at Urbana-Champaign, 1308 W. Main St., Urbana, IL
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Downloads (6 Weeks): 5, Downloads (12 Months): 13, Citation Count: 6
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ABSTRACT
In this paper, we present a new statistical techniquefor estimating average power dissipation in sequential circuits.Due to the feedback mechanism, in sequential circuitspower dissipation in consecutive clock cycles are temporallycorrelated, which violates the basic requirement ofstatistical mean inference procedures. We overcome thisproblem by using a randomness test and a sequential procedureto select a proper independence interval, which in turnis used to generate random power samples. A distribution-independentstopping criterion is applied to analyze thesample data and terminate the simulation upon achievementof the accuracy specification. The technique is successfullyapplied to a set of benchmark circuits.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 6
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Gregory Steele , David Overhauser , Steffen Rochel , Syed Zakir Hussain, Full-chip verification methods for DSM power distribution systems, Proceedings of the 35th annual conference on Design automation, p.744-749, June 15-19, 1998, San Francisco, California, United States
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