Power macromodeling for high level power estimation

ABSTRACT

A modeling approach is presentedthat captures the dependence of the power dissipationof a combinational logic circuit on its input/outputsignal switching activity.The resultingpower macromodel, consisting of a single three dimensionaltable, can be used to estimate the powerconsumed in the circuit for any given input/outputsignal statistics.Given a low-level (typically gate-level)description of the circuit, we describe a characterizationprocess by which such a table modelcan be automatically built.In contrast to otherproposed techniques, this can be done for any givenlogic circuit without any user intervention, and appliesto all possible input/output signal statistics;it does not require one to construct specialized analyticalequations for the power dissipation.Thethree dimensions of our table-based model are theaverage input signal probability, average input transitiondensity, and average output zero-delay transition density.This approach has been implemented and modelshave been built for many benchmark circuits.Overa wide range of input signal statistics, we show thatthis model gives very good accuracy, with an RMSerror of under about 6%.

REFERENCES

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Combinational logic

Additional Classification:
  C. Computer Systems Organization

General Terms:
Design, Measurement, Performance, Reliability, Theory