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Remembrance of things past: locality and memory in BDDs
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 34th annual Design Automation Conference table of contents
Anaheim, California, United States
Pages: 196 - 201  
Year of Publication: 1997
ISBN:0-89791-920-3
Authors
Srilatha Manne  University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
Dirk Grunwald  University of Colorado, Department of Computer Science, Boulder, CO
Fabio Somenzi  University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
Sponsors
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

Binary Decision Diagrams (BDDs) are efficient at manipulating large sets in a compact manner. BDDs, however, are inefficient at utilizing the memory hierarchy ofthe computer. Recent work addresses this problem by manipulating the BDDsin breath-first manner (BFS). BFS processing is quite successful at reducing the number of page faults when the BDDs do not fit in the available physical memory. When pagingdoes not take place, it is much less clear which paradigmleads to the better performance. In this paper, we perform adetailed analysis of BFS and DFS packages using simulationand direct performance monitoring ofthe memory hierarchy.We show that there is very little difference in TLB and cachemiss rates for DFS and BFS paradigms. We also show thatdifferences in execution time between carefully tuned BFSand DFS implementations are primarily a function of thelossless computed table used in BFS implementations, andnot a function of memory locality. Furthermore, we presentimplementation changes to the the Cudd package that canimprove execution times by asmuch as 26% when the problem fits in main memory, and a factor of six when paging is involved.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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R. K. Brayton et al. VIS: A system for verification and synthesis. Technical Report UCB/ERL M95/104, Electronics Research Lab, Univ. of California, December 1995.
 
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D. E. Long. Robdd package, 1993.
 
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F. Somenzi. CUDD: CU Decision Diagram Package. ftp://vlsi.colorado.e du / pub/.
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Collaborative Colleagues:
Srilatha Manne: colleagues
Dirk Grunwald: colleagues
Fabio Somenzi: colleagues