| An integrated design environment for performance and dependability analysis |
| Full text |
Pdf
(120 KB)
|
| Source
|
Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 34th annual Design Automation Conference
table of contents
Anaheim, California, United States
Pages: 184 - 189
Year of Publication: 1997
ISBN:0-89791-920-3
|
|
Authors
|
|
Robert H. Klenke
|
Department of Electrical Engineering, University of Virginia, Charlottesville, VA
|
|
Moshe Meyassed
|
Department of Electrical Engineering, University of Virginia, Charlottesville, VA
|
|
James H. Aylor
|
Department of Electrical Engineering, University of Virginia, Charlottesville, VA
|
|
Barry W. Johnson
|
Department of Electrical Engineering, University of Virginia, Charlottesville, VA
|
|
Ramesh Rao
|
Department of Electrical Engineering, University of Virginia, Charlottesville, VA
|
|
Anup Ghosh
|
Department of Electrical Engineering, University of Virginia, Charlottesville, VA
|
|
| Sponsors |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 4, Downloads (12 Months): 18, Citation Count: 4
|
|
|
ABSTRACT
This paper presents an integrated design environment thatsupports the design and analysis of digital systems from initialconcept to the final implementation. The environment supports bothsystem level performance and dependability analysis from acommon modeling representation. A tool called ADEPT (AdvancedDesign Environment Prototype Tool) has been developed toimplement the environment. ADEPT is based on IEEE 1076 VHDLand uses commercial schematic capture systems as a front end viaan EDIF interface. Several examples are presented whichdemonstrate various aspects of the environment.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
ASIC & EDA, January 1993
|
| |
2
|
SES/Workbench User's Guide, Scientific Engineering Software, Inc., Austin, Texas, April 1989.
|
 |
3
|
|
| |
4
|
Evans, B. L., A. Kamas, E. A. Lee, "Design and Simulation of Heterogeneous Systems Using Ptolemy," Proceedings of the 1 st Annual RASSP Conference, pp. 97-105.
|
| |
5
|
Foresight User's Guide, Nu-Thena Systems, McLean, VA, 1995
|
| |
6
|
IEEE Standard VHDL Language Reference Manual, IEEE, New York, NY, IEEE Std. 1076-1993, June 6, 1994.
|
| |
7
|
J.H. Aylor, R. Waxman, B. W. Johnson, R. D. Williams, "The Integration of Performance and Functional Modeling in VHDL," in Pelformance and Fault Modeling with VHDL, J. M. Schoen (Ed.), Prentice-Hall, Englewood Cliffs, NJ, 1992, pp. 22-145.
|
| |
8
|
|
| |
9
|
"ADEPT A.1 Library Reference Manual," CSIS Technical report 960625.0, University of Virginia, June 6, 1996.
|
| |
10
|
J.B. Dennis, "Modular, Asynchronous Control Structure for a High Performance Processor," ACM Conference Record, Project MAC, Massachusetts, 1970, pp. 55-80.
|
| |
11
|
Klenke, R. H., A. E Voss, J. H. Aylor, "Performance Modeling of Multicomputer Systems in VHDL using ADEPT," lASTED International Conference on Modeling and Simulation, May 1997, (to appear).
|
| |
12
|
M. Meyassed, R. M. McGraw, J. H. Aylor, R. H. Klenke, R. D. Williams, F. Rose, and J. Shackleton, "A Framework for the Development of Hybrid Models," Proceedings of the 2nd Annual RASSP Conference, July, 1995, pp. 147- 154.
|
| |
13
|
R. Rao, G. Swaminathan, B. W. Johnson, and J. H. Aylor, "Synthesis of Reliability Models from Behavioral- Performance Models," Proceedings of the 1994 Reliability and Maintainability Symposium (RAMS), January 1994, pp. 292-297.
|
| |
14
|
M. K. Molloy, "Performance Analysis Using Stochastic Petri Nets," IEEE Transactions on Computers, Vol. 31, No. 9, Sept. 1982, pp. 913-917.
|
| |
15
|
E. D. Cutright and B. W. Johnson, "A Simulation-based Approach to Integrated Performance and Reliability Modeling using VHDL," Proceedings of the 1994 Reliability and Maintainability Symposium (RAMS), January 1994, pp. 402-408.
|
CITED BY 4
|
|
Robert McGraw , James H. Aylor , Robert H. Klenke, A top-down design environment for developing pipelined datapaths, Proceedings of the 35th annual conference on Design automation, p.236-241, June 15-19, 1998, San Francisco, California, United States
|
|
|
|
|
|
|
|
|
|
|