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A graph-based synthesis algorithm for AND/XOR networks
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 34th annual Design Automation Conference table of contents
Anaheim, California, United States
Pages: 107 - 112  
Year of Publication: 1997
ISBN:0-89791-920-3
Authors
Yibin Ye  School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
Kaushik Roy  School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
Sponsors
EDAC : Electronic Design Automation Consortium
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper, we introduce a Shared Multiple Rooted XOR-based Decomposition Diagram (XORDD) to represent functions with multiple outputs. Based on the XORDD representation, we develop a synthesis algorithm for generalExclusive Sum-of-Product forms (ESOP). By iteratively applying transformations and reductions, we obtain a compactXORDD which gives a minimized ESOP. Our method cansynthesize larger circuits than previously possible. The compact ESOP representation provides a form that is easier to synthesize for XOR heavy multi-level circuit, such as arithmetic functions. We have applied our synthesis techniquesto a large set of benchmark circuits in both PLA and combinational formats. Results of the minimized ESOP forms obtained from our synthesis algorithm are also comparedto the SOP forms generated by ESPRESSO. Among the 74circuits we have experimented with, the minimized ESOP'shave fewer product terms than those of SOP's in 39 circuits.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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