Efficient testing of clock regenerator circuits in scan designs

ABSTRACT

This paper describes the use of a high-level view (functionalview) of a clock regenerator circuit for generating effective andinexpensive manufacturing tests. It is shown that the tests generatedfrom the traditional, structural view add hardwareoverhead, increase design time and potentially lower effectiveyield when compared to the tests generated from the functionalview. A test generation procedure is described and successfullyused on a microprocessor design.

REFERENCES

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INDEX TERMS

Primary Classification:
  C. Computer Systems Organization

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Simulation
      B.7.3 Reliability and Testing**
          Subjects: Test generation**

General Terms:
Design, Measurement, Performance, Reliability, Theory

Keywords:
clock regenerators, clocks, fault simulation, microprocessor testing, test pattern generation