|
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
 |
1
|
|
| |
2
|
C. Tsui et al., "Power efficient technology decomposition and mapping under an extended power consumption modcl," IEEE TOAD, vol. 13, n. 9, pp. 1110-1122, 1994.
|
| |
3
|
|
 |
4
|
|
 |
5
|
|
 |
6
|
Bernhard Rohfleisch , Alfred Kölbl , Bernd Wurth, Reducing power dissipation after technology mapping by structural transformations, Proceedings of the 33rd annual conference on Design automation, p.789-794, June 03-07, 1996, Las Vegas, Nevada, United States
[doi> 10.1145/240518.240667]
|
| |
7
|
R. Bahar , M. Burns , G. Hachtel , E. Macii , H. Shin , F. Somenzi, Symbolic computation of logic implications for technology-dependent low-power synthesis, Proceedings of the 1996 international symposium on Low power electronics and design, p.163-168, August 12-14, 1996, Monterey, California, United States
|
| |
8
|
|
| |
9
|
F. Somenzi et al., "Minimization of Boolean relations," in ISCAS, pp. 738-473, 1989.
|
| |
10
|
P. Schneider, "PAPSAS: A fast switching activity simulator," in PATMOS, pp. 350--360, 1995.
|
| |
11
|
L. Benini et al., "Generalized matchingt a new approach to concurrent logic optimization and library binding/' A aM TODAES, 1997.
|
| |
12
|
Ellen Sentovich , Kanwar Jit Singh , Cho W. Moon , Hamid Savoj , Robert K. Brayton , Alberto L. Sangiovanni-Vincentelli, Sequential Circuit Design Using Synthesis and Optimization, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.328-333, October 11-14, 1992
|
| |
13
|
|
| |
14
|
R. Iris Bahar , Erica A. Frohm , Charles M. Gaona , Gary D. Hachtel , Enrico Macii , Abelardo Pardo , Fabio Somenzi, Algebraic decision diagrams and their applications, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.188-191, November 07-11, 1993, Santa Clara, California, United States
|
| |
15
|
P. Vuillod et al., "Generalized matching from theory to practice," in preparation.
|
| |
16
|
Y. Watanabe et al., "Permissible functions for multloutput components in combinational logic optimizatlont" IEEE TOAD vol. 15, no. 7, pp. 734-744, 1996.
|
| |
17
|
R. Burch et al., "A Monte Carlo approach for power cstlmation," IEEE TVLSI vol. 1, n. 1, pp. 63-71, 1993,
|
| |
18
|
F. Somenzi. The OUDD package User's guldc. Version l,O,a 1995.
|
| |
19
|
S. Yang, "Logic Synthesis and Optimization Benchmarks User Guide Version 3.0," Technical rcporf, MONG, Rcscarclt Triangle Park, NO, 1991.
|
CITED BY 4
|
|
|
|
|
Balakrishna Kumthekar , Luca Benini , Enrico Macii , Fabio Somenzi, In-place power optimization for LUT-based FPGAs, Proceedings of the 35th annual conference on Design automation, p.718-721, June 15-19, 1998, San Francisco, California, United States
|
|
|
|
|
|
Patrick Vuillod , Luca Benini , Giovanni De Micheli, Generalized matching from theory to application, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.13-20, November 09-13, 1997, San Jose, California, United States
|
|