Synthesis of low-power asynchronous circuits in a specified environment

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Synthesis of low-power asynchronous circuits in a specified environment

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1997 international symposium on Low power electronics and design table of contents

Monterey, California, United States

Pages: 92 - 95

Year of Publication: 1997

ISBN:0-89791-903-3

Authors

Steven M. Nowick	Department of Computer Science, Columbia University, New York
Michael Theobald	Department of Computer Science, Columbia University, New York

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 8, Citation Count: 0

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references collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	R. Iris Bahar , Fabio Somenzi, Boolean techniques for low power driven re-synthesis, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.428-432, November 05-09, 1995, San Jose, California, United States
	2	P.A. B~rel, ICY.Yun, S.M. Nowick, and P.-C. Yeh. Estimation and bounding of energy consumption in burst-mode con~-ol circuits. In ICCAD, 1995.
	3	G. M. Birtwistle , A. Davis, Asynchronous Digital Circuit Design, Springer-Verlag New York, Inc., Secaucus, NJ, 1995
	4	A.P. Chandmkasan, S. Sheng, and R.W. Brodersen. Low-power CMOS digital design. IEEE Journal of Solid-State Circuits, 27(4):473--484, April 1992.
	5	Olivier Coudert , Ramsey Haddad, Integrated resynthesis for low power, Proceedings of the 1996 international symposium on Low power electronics and design, p.169-174, August 12-14, 1996, Monterey, California, United States
	6	Srinivas Devadas , Sharad Malik, A survey of optimization techniques targeting low power VLSI circuits, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.242-247, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217536]
	7	M. Favalli , L. Benini, Analysis of glitch power dissipation in CMOS ICs, Proceedings of the 1995 international symposium on Low power design, p.123-128, April 23-26, 1995, Dana Point, California, United States [doi>10.1145/224081.224103]
	8	Sasan Iman , Massoud Pedram, Logic extraction and factorization for low power, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.248-253, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217537]
	9	Sasan Iman , Massoud Pedram, Two-level logic minimization for low power, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.433-438, November 05-09, 1995, San Jose, California, United States
	10	José Monteiro , Srinivas Devadas, Techniques for the power estimation of sequential logic circuits under user-specified input sequences and programs, Proceedings of the 1995 international symposium on Low power design, p.33-38, April 23-26, 1995, Dana Point, California, United States [doi>10.1145/224081.224088]
	11	Farid N. Najm, Power estimation techniques for integrated circuits, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.492-499, November 05-09, 1995, San Jose, California, United States
	12	Steven M. Nowick , Bill Coates, UCLOCK: Automated Design of High-Peformance Unclocked State Machines, Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, p.434-441, October 10-12, 1994
	13	Steven M. Nowick , David L. Dill, Synthesis of Asynchronous State Machines Using A Local Clock, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.192-197, October 14-16, 1991
	14	S.M. Nowick and D.L. Dill. Exact two-level minimization of hazard-fre~ logic with multiple-input changes. IEEE Transactions on CAD, 14(8):986-997, 1995.
	15	S.M. Nowick and M.Theobald. Synthesis of low-power asynchronous circuits in a specified environment. Technical Report CUCS-020-97 Columbia University 1997. ' '
	16	Hirendu Vaishnav , Massoud Pedram, Delay optimal partitioning targeting low power VLSI circuits, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.638-643, November 05-09, 1995, San Jose, California, United States
	17	Kenneth Y. Yun , David L. Dill, Automatic synthesis of 3D asynchronous state machines, Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design, p.576-580, November 1992, Santa Clara, California, United States

Collaborative Colleagues:

Steven M. Nowick: colleagues

Michael Theobald: colleagues

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