| Techniques for low energy software |
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International Symposium on Low Power Electronics and Design
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Proceedings of the 1997 international symposium on Low power electronics and design
table of contents
Monterey, California, United States
Pages: 72 - 75
Year of Publication: 1997
ISBN:0-89791-903-3
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Authors
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Huzefa Mehta
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Equator Technologies, Cambell, CA
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Robert Michael Owens
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Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
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Mary Jane Irwin
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Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
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Rita Chen
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Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
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Debashree Ghosh
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Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
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| Bibliometrics |
Downloads (6 Weeks): 3, Downloads (12 Months): 27, Citation Count: 22
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 REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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1
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Benini L., Bogliolo A., Favalli M., and Micheli G. Regression models for behavioral power estimation, in International workshop on power and timing modeling, optimization and simulation, 1996.
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3
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Hostetler Larry B. and Mirtich Brian. Dlxsim: A simulator for DLX,
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4
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Landman Paul E. and Rabaey Jan M. Architectural power analysis: The dual-bit type method, in EDAC-EUROASIC, pages 370-377, 1993.
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5
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Landman Paul E. and Rabaey Jan M. Power estimation for high level synthesis. In EDAC-EUROASIC, pages 361-366, 1993.
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6
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Landman Paul E. and Rabaey Jan M. Black-box capacitance models for architectural power analysis. In Proceedings of the International Workshop on Low Power Design, pages 165-.170, April 1994.
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7
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8
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Lee Mike and Tiwari Vivek, A memory allocation technique for lowenergy embedded DSP software. In Proceedings of the 1995 Symposium on Low Power Electronics, 1995.
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9
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Mike Tien-Chien Lee , Vivek Tiwari , Sharad Malik , Masahiro Fujita, Power analysis and low-power scheduling techniques for embedded DSP software, Proceedings of the 8th international symposium on System synthesis, p.110-115, September 13-15, 1995, Cannes, France
[doi> 10.1145/224486.224525]
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10
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Mchta Huzefa, Owens Robert Michael, and Irwin Mary Jane. Instruction level power profiling, in International Conference on Acoustics, Speech and Signal Processing, 1996.
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11
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Huzefa Mehta , Robert Michael Owens , Mary Jane Irwin, Energy characterization based on clustering, Proceedings of the 33rd annual conference on Design automation, p.702-707, June 03-07, 1996, Las Vegas, Nevada, United States
[doi> 10.1145/240518.240651]
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12
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13
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Su C., Tsui C., and De, spain Alvin. Low power architecture design and compilation techniques for high-performance processors. In IEEE Symposium on Low Power Electronics, pages 49-58, March 1994.
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14
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Tiwad Vivek, Malik Sharad, and Wolfe Andrew. Compilation techniques for low energy: An overview. In Proceedings of the 1994 Symposium on Low Power Electronics, 1994.
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15
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Vivek Tiwari , Sharad Malik , Andrew Wolfe, Power analysis of embedded software: a first step towards software power minimization, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.384-390, November 06-10, 1994, San Jose, California, United States
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16
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Vivek Tiwari , Pranav Ashar , Sharad Malik, Technology mapping for lower power, Proceedings of the 30th international conference on Design automation, p.74-79, June 14-18, 1993, Dallas, Texas, United States
[doi> 10.1145/157485.164581]
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CITED BY 22
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Tajana Simunic , Luca Benini , Giovanni De Micheli, Energy-efficient design of battery-powered embedded systems, Proceedings of the 1999 international symposium on Low power electronics and design, p.212-217, August 16-17, 1999, San Diego, California, United States
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Nikolaos Bellas Ibrahim Hajj , George Stamoulis , N. Bellas , C. Polychronopoulos, Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors, Proceedings of the 1998 international symposium on Low power electronics and design, p.70-75, August 10-12, 1998, Monterey, California, United States
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A. Bona , M. Sami , D. Sciuto , V. Zaccaria , C. Silvano , R. Zafalon, Energy estimation and optimization of embedded VLIW processors based on instruction clustering, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
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C. Gebotys , R. Gebotys , S. Wiratunga, Power minimization derived from architectural-usage of VLIW processors, Proceedings of the 37th conference on Design automation, p.308-311, June 05-09, 2000, Los Angeles, California, United States
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Young-Hwan Park , Sudeep Pasricha , Fadi J. Kurdahi , Nikil Dutt, Methodology for multi-granularity embedded processor power model generation for an ESL design flow, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, October 19-24, 2008, Atlanta, GA, USA
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