| A symbolic algorithm for low-power sequential synthesis |
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International Symposium on Low Power Electronics and Design
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Proceedings of the 1997 international symposium on Low power electronics and design
table of contents
Monterey, California, United States
Pages: 56 - 61
Year of Publication: 1997
ISBN:0-89791-903-3
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Authors
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Balakrishna Kumthekar
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University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
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In-Ho Moon
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University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
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Fabio Somenzi
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University of Colorado, Dept. of Electrical and Computer Engineering, Boulder, CO
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| Bibliometrics |
Downloads (6 Weeks): 1, Downloads (12 Months): 5, Citation Count: 2
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 REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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R.K. Brayton et al. VIS: A system for verification and synthesis. Technical Report UCB/ERL M95/104, Electronics Research Lab, Univ. of California, December 1995.
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R. K. Brayton, R. Rudell, A. Sangiovanni-Vincentelli, and A. R. Wang. MIS: A multiple-level interactive logic optimization system. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, CAD-6(6):1062- 1081, November 1987".
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F. M. Brown. Boolean Reasoning: The Logic of Boolean Equations. Kluwer, Boston, 1990.
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M. Fujita, Y. Tamiya, Y. Kukimoto, and K.-C. Chen. Application of boolean unification to combinational logic synthesis. In Proceedings of the International Conference on Computer-Aided Design, pages 510-513, Santa Clara, CA, November 1991.
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G. D. Hachtel, E. Macii, A. Pardo, and F. Somenzi. Markovian analysis of large finite state machines. IEEE Transactions on Computer-Aided Design, 15(12):1479--1493, December 1996.
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B. Lin, H. Touati, and A. R. Newton. Don't care minimization of multi-level sequential logic networks. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 414-417, Santa Clara, CA, November 1990.
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S.-I. Minato. Fast generation of irredundant sums-of-products forms from binary decision diagrams. In SASIMI '92, pages 64-73, Kyoto, Japan, April 1992.
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S.-I. Minato. Fast weak-division method for implicit cube representation. In SASIMI '93, pages 423-432, Nara, Japan, October 1993.
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Ellen Sentovich , Kanwar Jit Singh , Cho W. Moon , Hamid Savoj , Robert K. Brayton , Alberto L. Sangiovanni-Vincentelli, Sequential Circuit Design Using Synthesis and Optimization, Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors, p.328-333, October 11-14, 1992
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CITED BY 2
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Luca Benini , Giovanni De Micheli , Enrico Macii , Massimo Poncino , Stefano Quer, System-level power optimization of special purpose applications: the beach solution, Proceedings of the 1997 international symposium on Low power electronics and design, p.24-29, August 18-20, 1997, Monterey, California, United States
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Diana Marculescu , Radu Marculescu , Massoud Pedram, Theoretical bounds for switching activity analysis in finite-state machines, Proceedings of the 1998 international symposium on Low power electronics and design, p.36-41, August 10-12, 1998, Monterey, California, United States
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