A grid-based approach for connectivity binding with geometric costs

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A grid-based approach for connectivity binding with geometric costs

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International Conference on Computer Aided Design archive
Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design table of contents

Santa Clara, California, United States

Pages: 94 - 99

Year of Publication: 1993

ISBN:0-8186-4490-7

Authors

Hyuk-Jae Jang	Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
Barry M. Pangrle	Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA

Sponsors

IEEE-CS : Computer Society
SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 4, Downloads (12 Months): 12, Citation Count: 10

Additional Information:

references cited by collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 10

	Kiarash Bazargan , Abhishek Ranjan , Majid Sarrafzadeh, Fast and accurate estimation of floorplans in logic/high-level synthesis, Proceedings of the 10th Great Lakes symposium on VLSI, p.95-100, March 02-04, 2000, Chicago, Illinois, United States
	M. Xu , F. J. Kurdahi, Layout-driven high level synthesis for FPGA based architectures, Proceedings of the conference on Design, automation and test in Europe, p.446-450, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Min Xu , Fadi J. Kurdahi, Layout-driven RTL binding techniques for high-level synthesis using accurate estimators, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.2 n.4, p.312-343, Oct. 1997
	Kyumyung Choi , Steven P. Levitan, A flexible datapath allocation method for architectural synthesis, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.4 n.4, p.376-404, Oct. 1999
	Junhyung Um , Jae-hoon Kim , Taewhan Kim, Layout-driven resource sharing in high-level synthesis, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.614-618, November 10-14, 2002, San Jose, California
	Yung-Ming Fang , D. F. Wong, Simultaneous functional-unit binding and floorplanning, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.317-321, November 06-10, 1994, San Jose, California, United States
	Junhyung Um , Taewhan Kim, Resource Sharing Combined with Layout Effects in High-Level Synthesis, Journal of VLSI Signal Processing Systems, v.44 n.3, p.231-243, September 2006
	Min Xu , Fadi Kurdahi, RTL Synthesis with Physical and Controller Information, Proceedings of the 1997 European conference on Design and Test, p.299, March 17-20, 1997
	Min Xu , F. J. Kurdahi, Layout-driven RTL binding techniques for high-level synthesis, Proceedings of the 9th international symposium on System synthesis, p.33, November 06-08, 1996
	Kyoung-Hwan Lim , YongHwan Kim , Taewhan Kim, Interconnect and communication synthesis for distributed register-file microarchitecture, Proceedings of the 44th annual conference on Design automation, June 04-08, 2007, San Diego, California

Collaborative Colleagues:

Hyuk-Jae Jang: colleagues

Barry M. Pangrle: colleagues

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