Accommodating memory latency in a low-cost rasterizer

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Accommodating memory latency in a low-cost rasterizer

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SIGGRAPH/EUROGRAPHICS Conference On Graphics Hardware archive
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware table of contents

Los Angeles, California, United States

Pages: 97 - 101

Year of Publication: 1997

ISBN:0-89791-961-0

Authors

Bruce Anderson	David Samoff Research Center, Princeton, New Jersey
Andy Stewart	Phoenix VLSI Design, Towcester, Northamptonshire, UK
Rob MacAulay	Ben Cheese Electronic Design, Royston, Cambridgeshire, UK
Turner Whitted	The University of North Carolina, Chapel Hill, North Carolina

Sponsors

SIGGRAPH: ACM Special Interest Group on Computer Graphics and Interactive Techniques
Eurographics :

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ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 26, Citation Count: 4

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Kurt Akeley , Tom Jermoluk, High-performance polygon rendering, ACM SIGGRAPH Computer Graphics, v.22 n.4, p.239-246, Aug. 1988 [doi>10.1145/378456.378516]
	2	Loren Carpenter, The A -buffer, an antialiased hidden surface method, Proceedings of the 11th annual conference on Computer graphics and interactive techniques, p.103-108, January 1984 [doi>10.1145/800031.808585]
	3	Clark, J. H., and M. Hannah. "Distributed Processing in a High-Performance Smart Image Memory, Lambda 1,3, 4th Quarter 1980, pp, 40-45.
	4	Michael F. Deering , Stephen A. Schlapp , Michael G. Lavelle, FBRAM: a new form of memory optimized for 3D graphics, Proceedings of the 21st annual conference on Computer graphics and interactive techniques, p.167-174, July 1994 [doi>10.1145/192161.192194]
	5	Henry Fuchs , Brian W. Johnson, An expandable multiprocessor architecture for video graphics (Preliminary Report), Proceedings of the 6th annual symposium on Computer architecture, p.58-67, April 23-25, 1979 [doi>10.1145/800090.802893]
	6	Andy Goris , Bob Fredrickson , Harold L. Baeverstad, Jr., A configurable pixel cache for fast image generation, IEEE Computer Graphics and Applications, v.7 n.3, p.24-32, March 1987 [doi>10.1109/MCG.1987.276962]
	7	Steven Molnar , John Eyles , John Poulton, PixelFlow: high-speed rendering using image composition, ACM SIGGRAPH Computer Graphics, v.26 n.2, p.231-240, July 1992 [doi>10.1145/142920.134067]
	8	Jay Torborg , James T. Kajiya, Talisman: commodity realtime 3D graphics for the PC, Proceedings of the 23rd annual conference on Computer graphics and interactive techniques, p.353-363, August 1996 [doi>10.1145/237170.237274]
	9	Red Planet, FASA/Virtual Worlds Entertainment.
	10	Whitton, M., "Memory Design for Raster Graphics Displays," IEEE CG&A 4, 3 (March 1984), pp. 48-65.

CITED BY 4

	Homan Igehy , Matthew Eldridge , Kekoa Proudfoot, Prefetching in a texture cache architecture, Proceedings of the ACM SIGGRAPH/EUROGRAPHICS workshop on Graphics hardware, p.133-ff., August 31-September 01, 1998, Lisbon, Portugal
	Timothy J. Purcell , Ian Buck , William R. Mark , Pat Hanrahan, Ray tracing on programmable graphics hardware, ACM Transactions on Graphics (TOG), v.21 n.3, July 2002
	Timothy J. Purcell , Ian Buck , William R. Mark , Pat Hanrahan, Ray tracing on programmable graphics hardware, ACM SIGGRAPH 2005 Courses, July 31-August 04, 2005, Los Angeles, California
	T. Inada , M. D. McCool, Compressed lossless texture representation and caching, Proceedings of the 21st ACM SIGGRAPH/Eurographics symposium on Graphics hardware, September 03-04, 2006, Vienna, Austria