Laser correcting defects to create transparent routing for large area FPGA's

ABSTRACT

Creating large area FPGA's is limited by the presence of defective sections. The techniques developed in wafer scale work solve this problem by using defect avoidance routing around flawed blocks to build complete working systems. FPGA's have the main features required for successful defect avoidance systems: a repeatable cell, built in need for switchable flexible routing and high flexibility with potentially large number of applications. Laser formed connections and cuts have proved to be effective in bypassing fabrication time defects and creating defect free working systems up to wafer scale in area. Power shorts and clock distribution errors can effectively be eliminated using these laser links. In addition it is important to minimize signal delays so the bypassing of the defective cells is nearly invisible. Experiments on a small test FPGA shows defect avoidance routing using laser link structures generates delays which are about half those obtained by the active switches required for the FPGA's operation. Thus laser defect avoidance after fabrication removes the errors creating a large area FPGA whose defective cell distribution is nearly unseen by the user.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Placement and routing
      B.7.3 Reliability and Testing**
          Subjects: Test generation**

General Terms:
Design, Experimentation, Performance