Memory-to-memory connection structures in FPGAs with embedded memory arrays

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Memory-to-memory connection structures in FPGAs with embedded memory arrays

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International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays table of contents

Monterey, California, United States

Pages 10-16

Year of Publication: 1997

ISBN:0-89791-801-0

Authors

Steven J. E. Wilton	Dept. of Electrical Engineering, University of British Columbia, Vancouver, BC, Canada, V6T 1Z4
Jonathan Rose	Dept. of Electrical and Computer Engineering, University of Toronto, Toronto, Ontario, Canada M5S 3G4
Zvonko G. Vranesic	Dept. of Electrical and Computer Engineering, University of Toronto, Toronto, Ontario, Canada M5S 3G4

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 25, Citation Count: 3

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ABSTRACT

This paper shows that the speed of FPGAs with large embedded memory arrays can be improved by adding direct programmable connections between the memories. Nets that connect to multiple memory arrays are often difficult to route, and are often part of the critical path of circuit implementations. The memory-to-memory connection structure proposed in this paper allows for the efficient implementation of these nets, resulting in a reduction in memory access time of up to 25% and a slight improvement in routability.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 3

	Frank Heile , Andrew Leaver , Kerry Veenstra, Programmable memory blocks supporting content-addressable memory, Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays, p.13-21, February 10-11, 2000, Monterey, California, United States
	Frank Heile , Andrew Leaver, Hybrid product term and LUT based architectures using embedded memory blocks, Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays, p.13-16, February 21-23, 1999, Monterey, California, United States
	Steven J. E. Wilton, SMAP: heterogeneous technology mapping for area reduction in FPGAs with embedded memory arrays, Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays, p.171-178, February 22-25, 1998, Monterey, California, United States