ACM Home Page
Please provide us with feedback. Feedback
PRISM architecture: parallel and pipeline features
Full text PdfPdf (632 KB)
Source International Symposium on Microarchitecture archive
Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture table of contents
Orlando, Florida, United States
Pages: 230 - 236  
Year of Publication: 1990
ISBN:0-89791-413-9
Author
Beverly Gocal  Picker International, Highland Heights, Ohio
Sponsors
IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 7,   Citation Count: 0
Additional Information:

abstract   references   collaborative colleagues  

Tools and Actions: Review this Article  

ABSTRACT

Reconstruction of Computer Tomography images requires several processing steps for reduction of electronic noise and correction of physical inaccuracies. The most time-consuming step is a convolution implemented with Fast Fourier Transforms. The architecture of a single board computer designed to provide an efficient implementation of the Fast Fourier Transform is presented. Parallel and pipeline features are discussed and a typical array routine is used to present software features.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
C. Brunnett, B. Gocal, M. Kerber, J. Pexa and C. Vrettos, U.S. patent, "PRISM Architecture for CT Image Recontruction", filed Aug., 1989
 
2
C. Brunnett, B. Gocal, M. Kerber, J. Pexa and C. Vrettos, U.S. patent, "An Array Processor with Custom Processor Elements and an Arithmetic Section", filed Nov., 1988
 
3
M. Kerber and J. Sidoti, U.S. patent, "Custom Integrated Circuit to Facilitate High Speed Digital Signal Processing Computations", filed Nov., 1988
 
4
Weitek Specifications, "WTL 2264/WTL 2265 Floating Point Multiplier/Divider and ALU", Weitek Corporation, 1060 E. Arques, Sunnyvale, Calif. 94086, 1987
 
5
Handler, W., "The Impact of Classification Schemes on Computer Architecture", Proc. 1977 International Conference on Parallel Processing, pp 7-15.
 
6