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Ideograph/Ideogram: framework/hardware for eager evaluation
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Source International Symposium on Microarchitecture archive
Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture table of contents
Orlando, Florida, United States
Pages: 125 - 134  
Year of Publication: 1990
ISBN:0-89791-413-9
Authors
S. ShouHan Wang  Department of Computer Science and Engineering, C-014, University of California, San Diego, La Jolla, CA
Augustus K. Uht  Department of Computer Science and Engineering, C-014, University of California, San Diego, La Jolla, CA
Sponsors
IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 9,   Citation Count: 3
Additional Information:

abstract   references   cited by   collaborative colleagues  

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ABSTRACT

Ideograph integrates data and control dependencies into a unified representation and is used to precisely characterize the concepts of branch prediction and eager evaluation. The Ideogram computer is designed to execute Ideographs. Unlike dataflow computers, The Ideogram computer accepts a 3-address code language called igf. Through igf, Ideographs are constructed and executed by the Ideogram computer at run-time. In this paper, the descriptions of both Ideograph and Ideogram computer are introduced, and the preliminary benchmark results are included.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Tilak Agerwala and Arvind. Data flow systems. IEEE Computer, 15(2):10-13, 1982.
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Yoichi Muraoka David Kuck and Shyh-Ching Chen. On the number of operations simultaneously executable in fortran-like programs and their resulting speedup. IEEE Transactions on Computers, 21(12):1293-1310, December 1972.
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J. A. Fisher. The vliw machine: A multiprocessor for compiling scientific code. IEEE Computer, pages 45-53, July 1984.
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E. M. Riseman and C. C. Foster. The inhibition of potential parallelism by conditional jumps. IEEE Transactions on Computers, pages 1405- 1411, December 1972.
 
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J. E. Thorton. Parallel operation in the control data 6600. In AFIPS Proceedings of the Fall Joint Computer Conference, pages 33-40, 1964.
 
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Harrick M. Vin, Francine Berman, and James Mattson. Controlled eager evaluation in a dynamic-arc tagged-token dataflow model. Technical Report TR-CS90-168, University of California, San Diego, La Jolla, Ca. 92093, January 1990.
 
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S. ShouHan Wang and Augustus K. Uht. Ideograph and minimal procedural dependencies. Technical Report TR-CS88-140, University of California, San Diego, La Jolla, Ca., December 1988.
 
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S. ShouHan Wang and Augustus K. Uht. Program optimization with ideograph. In International Conference on Parallel Processing, August 1989.
 
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S. ShouHan Wang and Augustus K. Uht. Ideograph: An imperative program graph for eager evaluation. Technical Report TR-CS90-172, University of California, San Diego, La Jolla, Ca., September 1990.
 
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Collaborative Colleagues:
S. ShouHan Wang: colleagues
Augustus K. Uht: colleagues