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Post-compaction register assignment in a retargetable compiler
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Source International Symposium on Microarchitecture archive
Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture table of contents
Orlando, Florida, United States
Pages: 107 - 116  
Year of Publication: 1990
ISBN:0-89791-413-9
Authors
Philip Sweany  Department of Computer Science, Colorado State University, Fort Collins, Colorado
Steven Beaty  Department of Mechanical Engineering, Colorado State University, Fort Collins, Colorado
Sponsors
IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 6,   Citation Count: 5
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abstract   references   cited by   collaborative colleagues  

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ABSTRACT

We discuss graph-coloring register assignment in a retargetable compiler for Long-Instruction-Word architectures. Of specific concern is when, during the compilation process, should register assignment be performed. We conclude that, for best results, register assignment should follow compaction. We discuss methods of circumventing the implementation problems inherent in such late register assignment.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
All86
 
All88
 
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BDM+88
S.J. Beaty, M.R. Duda., R.A. Mueller, P.H. Sweany, and J. Varghese. "Optimization issues for a retargetable optimizing microcode compiler". IEEE MicroArch, 3(1), December 1988.
 
BSKT79
U. Banerjee, S. Shen, D.J. Kuck, and R.A. Towle. "Time and parallel processor bounds for fortra.n-like loops". IEEE Transactions on Computers, C-28(9):660- 670, Sep 1979.
 
CAC+81
G.J. Chaitin, M.A. Auslander, A.K. Chandra, J. Cocke, M.E. Hopkins, and P.W. Markstein. "Register allocation via coloring". Computer Languages, 6, 1981.
Cha82
Das84
 
DDMS86
W. Damm, G. Doehmen, K. Merkel, and M. Sichelschmidt. "The AADL/S* Approach to Firmware Design Specification". IEEE Software, 3(4):27-37, July 1986.
 
Ell85
 
Hec77
 
HS80
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MS86
R.A. Mueller and P.H. Sweany. "Horizon Code Generator Series-Parallel DDG Coupler/Decoupler (Version 3.1)". Technical Report MAD-86-10, Firmware Engineering and MicroArchitecture Design Laboratory, Colorado State University, Fort Collins, CO, September 1986.
 
Nic84
 
PKL80
D.A. Padua, D.J. Kuck, and D.H. Lawrie. "High Speed Multiprocessors and Compilation Techniques". IEEE Transactions on Computers, C-29(9):763-776, Sept 1980.
PW86
 
Rob79
E.L. Robertson. "Microcode Bit Optimization is NP-complete". IEEE Transactions on Computers, C-28(4):316-319, April 1979.
 
Set75
R. Sethi. "Complete register allocation problems". SIAM Journal of Computing, 4(3):226-248, 1975.
 
Veg82

Collaborative Colleagues:
Philip Sweany: colleagues
Steven Beaty: colleagues