| Post-compaction register assignment in a retargetable compiler |
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International Symposium on Microarchitecture
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Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
table of contents
Orlando, Florida, United States
Pages: 107 - 116
Year of Publication: 1990
ISBN:0-89791-413-9
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Authors
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Philip Sweany
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Department of Computer Science, Colorado State University, Fort Collins, Colorado
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Steven Beaty
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Department of Mechanical Engineering, Colorado State University, Fort Collins, Colorado
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IEEE Computer Society Press
Los Alamitos, CA, USA
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| Bibliometrics |
Downloads (6 Weeks): 3, Downloads (12 Months): 6, Citation Count: 5
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ABSTRACT
We discuss graph-coloring register assignment in a retargetable compiler for Long-Instruction-Word architectures. Of specific concern is when, during the compilation process, should register assignment be performed. We conclude that, for best results, register assignment should follow compaction. We discuss methods of circumventing the implementation problems inherent in such late register assignment.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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All86
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All88
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ASU86
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Alfred V. Aho , Ravi Sethi , Jeffrey D. Ullman, Compilers: principles, techniques, and tools, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1986
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Ban88
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BC86
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BDM+88
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S.J. Beaty, M.R. Duda., R.A. Mueller, P.H. Sweany, and J. Varghese. "Optimization issues for a retargetable optimizing microcode compiler". IEEE MicroArch, 3(1), December 1988.
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BSKT79
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U. Banerjee, S. Shen, D.J. Kuck, and R.A. Towle. "Time and parallel processor bounds for fortra.n-like loops". IEEE Transactions on Computers, C-28(9):660- 670, Sep 1979.
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CAC+81
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G.J. Chaitin, M.A. Auslander, A.K. Chandra, J. Cocke, M.E. Hopkins, and P.W. Markstein. "Register allocation via coloring". Computer Languages, 6, 1981.
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Cha82
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Das84
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DDMS86
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W. Damm, G. Doehmen, K. Merkel, and M. Sichelschmidt. "The AADL/S* Approach to Firmware Design Specification". IEEE Software, 3(4):27-37, July 1986.
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Ell85
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Hec77
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HS80
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LDSM80
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MDSW88
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MS86
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R.A. Mueller and P.H. Sweany. "Horizon Code Generator Series-Parallel DDG Coupler/Decoupler (Version 3.1)". Technical Report MAD-86-10, Firmware Engineering and MicroArchitecture Design Laboratory, Colorado State University, Fort Collins, CO, September 1986.
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Nic84
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PKL80
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D.A. Padua, D.J. Kuck, and D.H. Lawrie. "High Speed Multiprocessors and Compilation Techniques". IEEE Transactions on Computers, C-29(9):763-776, Sept 1980.
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PW86
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|
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Rob79
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E.L. Robertson. "Microcode Bit Optimization is NP-complete". IEEE Transactions on Computers, C-28(4):316-319, April 1979.
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Set75
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R. Sethi. "Complete register allocation problems". SIAM Journal of Computing, 4(3):226-248, 1975.
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Veg82
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