A VLIW architecture based on shifting register files

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A VLIW architecture based on shifting register files

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International Symposium on Microarchitecture archive
Proceedings of the 26th annual international symposium on Microarchitecture table of contents

Austin, Texas, United States

Pages: 263 - 268

Year of Publication: 1993

ISBN:0-8186-5280-2

Authors

H. Fatih Uğurdağ	General Motors NAO R&D Center in Warren, MI and Department of Computer Engineering and Science, Case Western Reserve University, Cleveland, Ohio
Christos A. Papachristou	Department of Computer Engineering and Science, Case Western Reserve University, Cleveland, Ohio

Sponsors

IEEE-CS\TCMM : TC on Microprocessors & Microcomputers
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 6, Citation Count: 1

Additional Information:

references cited by collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	A. Aiken , A. Nicolau, Optimal loop parallelization, Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation, p.308-317, June 20-24, 1988, Atlanta, Georgia, United States
	2	Dennis, J. B. Data Flow Supercomputers, IEEE Transactions on Computers, November 1980, pp. 48-56.
	3	M. Lam, Software pipelining: an effective scheduling technique for VLIW machines, Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation, p.318-328, June 20-24, 1988, Atlanta, Georgia, United States
	4	B. R. Rau , C. D. Glaeser, Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing, Proceedings of the 14th annual workshop on Microprogramming, p.183-198, December 01-01, 1981, Chatham, Massachusetts, United States
	5	B. Ramakrishna Rau , David W. L. Yen , Wei Yen , Ross A. Towie, The Cydra 5 Departmental Supercomputer: Design Philosophies, Decisions, and Trade-Offs, Computer, v.22 n.1, p.12-26, 28-30, 32-35, January 1989 [doi>10.1109/2.19820]
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	7	Bogong Su , Jian Wang , Zhizhong Tang , Wei Zhao , Yimin Wu, A software pipelining based VLIW architecture and optimizing compiler, Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture, p.17-27, November 27-29, 1990, Orlando, Florida, United States
	8	Bogong Su , Wei Zhao , Zhizhong Tang , Stanley Habib, A VLIW architecture for optimal execution of branch-intensive loops, Proceedings of the 25th annual international symposium on Microarchitecture, p.119-124, December 01-04, 1992, Portland, Oregon, United States
	9	J. E. Thornton, Design of a Computer—The Control Data 6600, Scott Foresman & Co, 1970
	10	Tomasulo, R. M. An E. Oicient Algorithm for Exploiting Multiple Arithmetic Units, IBM Journal of Research and Development, Vol. 11, No. 1, January 1967, pp. 25-33.
	11	Andrew Wolfe , John P. Shen, A variable instruction stream extension to the VLIW architecture, Proceedings of the fourth international conference on Architectural support for programming languages and operating systems, p.2-14, April 08-11, 1991, Santa Clara, California, United States

CITED BY

Yanjun Zhang , Hu he , Yihe Sun, A new register file access architecture for software pipelining in VLIW processors, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China

Collaborative Colleagues:

H. Fatih Uğurdağ: colleagues

Christos A. Papachristou: colleagues

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