| Techniques for extracting instruction level parallelism on MIMD architectures |
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International Symposium on Microarchitecture
archive
Proceedings of the 26th annual international symposium on Microarchitecture
table of contents
Austin, Texas, United States
Pages: 128 - 137
Year of Publication: 1993
ISBN:0-8186-5280-2
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Authors
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Gary Tyson
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Computer Science Department, University of California, Davis, Davis, CA
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Matthew Farrens
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Computer Science Department, University of California, Davis, Davis, CA
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IEEE Computer Society Press
Los Alamitos, CA, USA
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| Bibliometrics |
Downloads (6 Weeks): 2, Downloads (12 Months): 9, Citation Count: 1
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REFERENCES
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CITED BY
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Jack L. Lo , Joel S. Emer , Henry M. Levy , Rebecca L. Stamm , Dean M. Tullsen , S. J. Eggers, Converting thread-level parallelism to instruction-level parallelism via simultaneous multithreading, ACM Transactions on Computer Systems (TOCS), v.15 n.3, p.322-354, Aug. 1997
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