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Techniques for extracting instruction level parallelism on MIMD architectures
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Source International Symposium on Microarchitecture archive
Proceedings of the 26th annual international symposium on Microarchitecture table of contents
Austin, Texas, United States
Pages: 128 - 137  
Year of Publication: 1993
ISBN:0-8186-5280-2
Authors
Gary Tyson  Computer Science Department, University of California, Davis, Davis, CA
Matthew Farrens  Computer Science Department, University of California, Davis, Davis, CA
Sponsors
IEEE-CS\TCMM : TC on Microprocessors & Microcomputers
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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M. Farrens and A. Pleszkun, "Overview of the PIPE Processor Implementation", Procee&'ngs of the 24th Annual Hawaii International Conference on System Sciences, Kapaa, Kauai (January 9-11, 1991), pp. 433-443.
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G.S. Tjaden and M. J. Flynn, "Detection and Parallel Execution of Parallel Instructions", IEEE Transactions on Computer(May 1970), pp. 889- 895.
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G.S. Tyson, R. Shaw and M. Fattens, "An Interactive Compiler Development System", Tcl/Tk Workshop(June 10-11, 1993).
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Collaborative Colleagues:
Gary Tyson: colleagues
Matthew Farrens: colleagues