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Measuring limits of parallelism and characterizing its vulnerability to resource constraints
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Source International Symposium on Microarchitecture archive
Proceedings of the 26th annual international symposium on Microarchitecture table of contents
Austin, Texas, United States
Pages: 105 - 117  
Year of Publication: 1993
ISBN:0-8186-5280-2
Authors
Lawrence Rauchwerger  Center for Supercomputing R.&D., University of Illinois, 422 CSRL, 1308 W. Main St., Urbana, IL
Pradeep K. Dubey  T. J. Watson Research Center, I.B.M., P.O. Box 704, Yorktown Heights, NY
Ravi Nair  T. J. Watson Research Center, I.B.M., P.O. Box 704, Yorktown Heights, NY
Sponsors
IEEE-CS\TCMM : TC on Microprocessors & Microcomputers
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
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Downloads (6 Weeks): 1,   Downloads (12 Months): 10,   Citation Count: 1
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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A. Nicolau and J. Fisher. Measuring the Parallelism Available for Very Long Instruction Word Architectures. IEEE Trans. on Computers, C-33(11), pp. 968-976, Nov. 1984.
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iBM RISC System/6600 Technology, Publication No. SA23-2619, IBM Corp., Austin Communications Dept., Austin, TX 78758.
 
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Collaborative Colleagues:
Lawrence Rauchwerger: colleagues
Pradeep K. Dubey: colleagues
Ravi Nair: colleagues