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Database buffer size investigation for OLTP workloads
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Source International Conference on Management of Data archive
Proceedings of the 1997 ACM SIGMOD international conference on Management of data table of contents
Tucson, Arizona, United States
Pages: 112 - 122  
Year of Publication: 1997
ISBN:0-89791-911-4
Also published in ...
Authors
Thin-Fong Tsuei  Sun Microsystems, Inc.
Allan N. Packer  Sun Microsystems, Inc.
Keng-Tai Ko  Sun Microsystems, Inc.
Sponsor
SIGMOD: ACM Special Interest Group on Management of Data
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 5,   Downloads (12 Months): 27,   Citation Count: 6
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ABSTRACT

It is generally accepted that On-Line Transaction Processing (OLTP) systems benefit from large database memory buffers. As enterprise database systems become larger and more complex, hardware vendors are building increasingly large systems capable of supporting huge memory configurations. Database vendors in turn are developing buffer schemes to exploit this physical memory. How much will these developments benefit OLTP workloads? Through empirical studies on databases sized comparably to those seen in the real-world, this paper presents the characteristics of an industry-standard OLTP benchmark as memory buffer size changes. We design the experiments to investigate how the database size, the buffer size and the number of CPUs impact performance, in particular the throughput and the buffer hit rate on Symmetric Multiprocessor Systems. The relationships of these major database attributes are plotted and key observations are summarized. We discuss how these relationships change as the number of CPUs changes. We further quantify the relationships: 1) between database buffer data hit rate, buffer size and database size, 2) between throughput, buffer data hit rate and database size and 3) between throughput and number of CPUs. Algorithms, rules-of-thumb and examples are presented for predicting performance, sizing memory and making trade-offs between adding more memory and increasing the number of CPUs.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Thin-Fong Tsuei: colleagues
Allan N. Packer: colleagues
Keng-Tai Ko: colleagues