Simulation based architectural power estimation for PLA-based controllers

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Simulation based architectural power estimation for PLA-based controllers

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1996 international symposium on Low power electronics and design table of contents

Monterey, California, United States

Pages: 121 - 124

Year of Publication: 1996

ISBN:0-7803-3571-6

Authors

S. Katkoori	ECE&CS Department, University of Cincinnati, Cincinnati, OHIO, OH
R. Vemuri	ECE&CS Department, University of Cincinnati, Cincinnati, OHIO, OH

Sponsors

IEEE-CAS : Circuits & Systems
IEEE-SSCS : Solid Stat Circuits Council
SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Press Piscataway, NJ, USA

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Downloads (6 Weeks): 2, Downloads (12 Months): 5, Citation Count: 1

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Paul E. Landman , Jan M. Rabaey, Activity-sensitive architectural power analysis for the control path, Proceedings of the 1995 international symposium on Low power design, p.93-98, April 23-26, 1995, Dana Point, California, United States [doi>10.1145/224081.224098]
	2	Nand Kumar , Srinivas Katkoori , Leo Rader , Ranga Vemuri, Profile-Driven Behavioral Synthesis for Low-Power VLSI Systems, IEEE Design & Test, v.12 n.3, p.70-84, September 1995 [doi>10.1109/MDT.1995.466383]
	3	Srinivas Katkoori and Ranga Vemuri, "Architectural Power Estimation Based on Behavioral Profiling", To appear in the Special Issue on Low Power Design, Journal on VLSI DE- SIGN, 1996.
	4	Farid N. Najm, A survey of power estimation techniques in VLSI circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.2 n.4, p.446-455, Dec. 1994 [doi>10.1109/92.335013]
	5	Robert King Brayton , Alberto L. Sangiovanni-Vincentelli , Curtis T. McMullen , Gary D. Hachtel, Logic Minimization Algorithms for VLSI Synthesis, Kluwer Academic Publishers, Norwell, MA, 1984
	6	S. Katkoori , N. Kumar , R. Vemuri, High level profiling based low power synthesis technique, Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors, p.446, October 02-04, 1995