Basic experimentation on accuracy of power estimation for CMOS VLSI circuits

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Basic experimentation on accuracy of power estimation for CMOS VLSI circuits

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1996 international symposium on Low power electronics and design table of contents

Monterey, California, United States

Pages: 117 - 120

Year of Publication: 1996

ISBN:0-7803-3571-6

Authors

T. Ishihara	Department of Computer Science and Communication Engineering, Graduate School of Information Science and Electrical Engineering, Kyushu University, 6-1 Kasuga-koen, Kasuga-shi, Fukuoka 816 Japan
H. Yasuura	Department of Computer Science and Communication Engineering, Graduate School of Information Science and Electrical Engineering, Kyushu University, 6-1 Kasuga-koen, Kasuga-shi, Fukuoka 816 Japan

Sponsors

IEEE-CAS : Circuits & Systems
IEEE-SSCS : Solid Stat Circuits Council
SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Press Piscataway, NJ, USA

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Downloads (6 Weeks): 6, Downloads (12 Months): 11, Citation Count: 0

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	2	Chi-Ying Tsui , Massoud Pedram , Alvin M. Despain, Efficient estimation of dynamic power consumption under a real delay model, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.224-228, November 07-11, 1993, Santa Clara, California, United States
	3	Jiing-Yuan Lin , Tai-Chien Liu , Wen-Zen Shen, A cell-based power estimation in CMOS combinational circuits, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.304-309, November 06-10, 1994, San Jose, California, United States
	4	A. Ghosh , S. Devadas , K. Keutzer , J. White, Estimation of average switching activity in combinational and sequential circuits, Proceedings of the 29th ACM/IEEE conference on Design automation, p.253-259, June 08-12, 1992, Anaheim, California, United States
	5	Harry J. M. Veendrick, "Short-Circuit Dissipation of Static CMOS Circuitry and Its Impact on the Design of Buffer Circuits," IEEE J. of SSC,SC-19, no. 4, Aug-1984 pp28-33.
	6	Keith A. Jenkins and Robert L. French "Measurement of VLSI Power Supply Current by Electron-Beam Probing" IEEE J. of SSC,SC-27, no. 6,June- 1992 pp948-951.
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	8	Tohru ishihara, Hiroto Yasuura "On Accuracy of Switch Level Power Estimation for CMOS LSI Circuits,"Technical Report on Design Automation,IPSJ,DA-75-4,pp.23-30.
	9	Hiroki Akabosi, Tohru Ishihara, Hiroto Yasuura,"An Approximate Estimation of Power for Processor Architecture Design,"Proceedings of Second Asian Pacific Conference on Hardware Description Languages (APCHDL'96),Bangalore,India,January 8-11,1996 pp23-27.
	10	Neil H. E. Weste , Kamran Eshraghian, Principles of CMOS VLSI design: a systems perspective, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1985
	11	Hiroyuki Kanbara, Hiroto Yasuura "KUE-CHIP2 : A Microprocessor for Education of LSI Design and Computer Hardware", Proceedings of SASIMI '95 pp.233-240.
	12	T.Nakagawa,A.Yamaga,W.Nagaura,M.Iwaihara, K.Murakami, H.Yasuura "Designing Educational Microprocessor QP-DLX with Full System", Proceedings of Second Asian Pacific Conference on Hardware Description Languages (APCHDL'94), Toyohashi,JAPAN,October 24-25,1994.