High-level power estimation

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High-level power estimation

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International Symposium on Low Power Electronics and Design archive
Proceedings of the 1996 international symposium on Low power electronics and design table of contents

Monterey, California, United States

Pages: 29 - 35

Year of Publication: 1996

ISBN:0-7803-3571-6

Author

Paul Landman

DSP R&D Center, Texas Instruments, Dallas, Texas

Sponsors

IEEE-CAS : Circuits & Systems
IEEE-SSCS : Solid Stat Circuits Council
SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Press Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): 11, Downloads (12 Months): 100, Citation Count: 16

Additional Information:

references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	15	Nand Kumar , Srinivas Katkoori , Leo Rader , Ranga Vemuri, Profile-Driven Behavioral Synthesis for Low-Power VLSI Systems, IEEE Design & Test, v.12 n.3, p.70-84, September 1995 [doi>10.1109/MDT.1995.466383]
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CITED BY 16

	Alexander Chatzigeorgiou , George Stephanides, Energy Metric for Software Systems, Software Quality Control, v.10 n.4, p.355-371, December 2002
	F. Ferrandi , F. Fummi , E. Macii , M. Poncino , D. Sciuto, Power estimation of behavioral descriptions, Proceedings of the conference on Design, automation and test in Europe, p.762-766, February 23-26, 1998, Le Palais des Congrés de Paris, France
	A. Doboli, Integrated hardware-software co-synthesis for design of embedded systems under power and latency constraints, Proceedings of the conference on Design, automation and test in Europe, p.612-619, March 2001, Munich, Germany
	Luca Benini , Giovanni De Micheli, Logic synthesis for low power, Logic Synthesis and Verification, Kluwer Academic Publishers, Norwell, MA, 2001
	Michael Eiermann , Walter Stechele, Novel modeling techniques for RTL power estimation, Proceedings of the 2002 international symposium on Low power electronics and design, August 12-14, 2002, Monterey, California, USA
	William Fornaciari , Paolo Gubian , Donatella Sciuto , Cristina Silvano, Power estimation of embedded systems: a hardware/software codesign approach, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001
	Guiseppe Bernacchia , Marios C. Papaefthymiou, Analytical macromodeling for high-level power estimation, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.280-283, November 07-11, 1999, San Jose, California, United States
	Subodh Gupta , Farid N. Najm, Power macromodeling for high level power estimation, Proceedings of the 34th annual conference on Design automation, p.365-370, June 09-13, 1997, Anaheim, California, United States
	Subodh Gupta , Farid N. Najm, Energy and peak-current per-cycle estimation at RTL, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.4, p.525-537, August 2003
	X. Liu , C. Papaefthymiou, A static power estimation methodolodgy for IP-based design, Proceedings of the conference on Design, automation and test in Europe, p.280-289, March 2001, Munich, Germany
	Imed Ben Dhaou , Hannu Tenhunen, Efficient library characterization for high-level power estimation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.6, p.657-661, June 2004
	Xun Liu , Marios C. Papaefthymiou, HyPE: hybrid power estimation for IP-based programmable systems, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
	Lipeng Cao, Circuit power estimation using pattern recognition techniques, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design, p.412-417, November 10-14, 2002, San Jose, California
	Alessandro Bolgiolo , Roberto Corgnati , Enrico Macii , Massimo Poncino, Parameterized RTL power models for soft macros, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.6, p.880-887, 12/1/2001
	M. Holzer , B. Knerr , P. Belanović , M. Rupp, Efficient design methods for embedded communication systems, EURASIP Journal on Embedded Systems, v.2006 n.1, p.21-21, January 2006
	Lin Zhong , S. Ravi , A. Raghunathan , N. K. Jha, Power estimation for cycle-accurate functional descriptions of hardware, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.668-675, November 07-11, 2004