A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits

ABSTRACT

Since the first papers on asymptotic waveform evaluation (AWE), Pade-based reduced order models have become standard for improving coupled circuit-interconnect simulation efficiency. Such models can be accurately computed using bi-orthogonalization algorithms like Pade via Lanczos (PVL), but the resulting Pade approximates can still be unstable even when generated from stable RLC circuits. For certain classes of RC circuits it has been shown that congruence transforms, like the Arnoldi algorithm, can generate guaranteed stable and passive reduced-order models. In this paper we present a computationally efficient model-order reduction technique, the coordinate-transformed Arnoldi algorithm, and show that this method generates arbitrarily accurate and guaranteed stable reduced-order models for RLC circuits. Examples are presented which demonstrates the enhanced stability and efficiency of the new method.

REFERENCES

• 1: Albert E. Ruehli. Equivalent Circuit Models for Three-Dimensional Multiconductor Systems. IEEE Transactions on Microwave Theory and Techniques, MTT-22(3):216-221, March 1974.
• 2: Lawrence T. Pillage and Ronald A. Rohrer. Asymptotic Waveform Evaluation for Timing Analysis. IEEE Trans. CAD, 9(4):352-366, April 1990.
• 3: E. Chiprout , M. Nakhla, Generalized moment-matching methods for transient analysis of interconnect networks, Proceedings of the 29th ACM/IEEE conference on Design automation, p.201-206, June 08-12, 1992, Anaheim, California, United States
• 4: Eli Chiprout , Hansruedi Heeb , Michel S. Nakhla , Alber E. Ruehli, Simulating 3-D retarded interconnect models using complex frequency hopping (CFH), Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.66-72, November 07-11, 1993, Santa Clara, California, United States
• 5: K. Gallivan, E. Grimme, and P. Van Dooren. Asymptotic Waveform Evaluation via a Lanczos Method. Applied Mathematics Letters, 7(5):75-80, 1994.
• 6: J. E. Bracken, V. Raghavan, and R. A. Rohrer. Interconnect Simulation with Asymptotic Waveform Evaluation. IEEE Trans. Circuits Syst., 39(11):869-878, November 1992.
• 7: P. Feldmann and R. W. Freund. Efficient linear circuit analysis by Pad'e approximation via the Lanczos process. IEEE Iransactions on Computer-Aided Design of Integrated Circuits and Systems, 14:639-649, 1995.
• 8: Kevin J. Kerns , Ivan L. Wemple , Andrew T. Yang, Stable and efficient reduction of substrate model networks using congruence transforms, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.207-214, November 05-09, 1995, San Jose, California, United States
• 9: F. P. Lees. The determination of the Moments of the Impulse Response of Chemical Processes from the basic transformed equations. Chemical Engineering Science, 24:1607-1613, 1969.
• 10: K. Gallivan, E. Grimme, and P. Van Dooren. Multipoint pad~ approximants of large-scale systems via a two-sided rational krylov algorithm. In 33~d IEEE Conference on Decision and Control, December 1994.
• 11: Peter Feldmann , Roland W. Freund, Efficient linear circuit analysis by Pade´ approximation via the Lanczos process, Proceedings of the conference on European design automation, p.170-175, September 19-23, 1994, Grenoble, France
• 12: Gilbert Strang. Linear Algebra and its Applications. Academic Press, New York, NY, second edition, 1980.
• 13: L. M. Silveira, M. Kamon, I. M. Elfadel, and J. White. Coupled circuit-interconnect analysis using Arnoldibased model order reduction. IEEE Trans. on CAD, 1995. Submitted.
• 14: Gene H. Golub and Charles F. Van Loan. Matrix Computations. The John Hopkins University Press, Baltimore, Maryland, 1983.
• 15: Curtis L. Ratzlaff and Lawrence T. Pillage. RICE: Rapid interconnect circuit evaluation using AWE. IEEE Trans. CAD, 13(6):763-776, June 1994.
• 16: P. Feldmann , R. W. Freund, Reduced-order modeling of large linear subcircuits via a block Lanczos algorithm, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.474-479, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217573]

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

Additional Classification:
  B. Hardware
  B.4 INPUT/OUTPUT AND DATA COMMUNICATIONS

  F. Theory of Computation
  F.2 ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY
      F.2.1 Numerical Algorithms and Problems
          Subjects: Computations on matrices

General Terms:
Algorithms, Design, Performance, Theory