Take a look at the new version of this page: [ beta version ]. Tell us what you think.

ABSTRACT

In a constraint-driven layout synthesis environment, parasitic constraints are generated and implemented in each phase of the design process to meet a given set of performance specifications. The success of the synthesis phase depends in great part on the effectiveness and the generality of the constraint generation process. None of the existing approaches to the constraint generation problem however are suitable for a number of parasitic effects in active and passive devices due to non-deterministic process variations. To address this problem a novel methodology is proposed based on the separation of all variables associated with non-deterministic parasitics, thus allowing the translation of the problem into an equivalent one in which conventional constrained optimization techniques can be used. The requirements of the method are a well-defined set of statistical properties for all parasitics and a reasonable degree of linearity of the performance measures relevant to design.

REFERENCES

• 1: U. Choudhury and A. L. Sangiovanni-Vincentelli, "Use of Performance Sensitivities in Routing of Analog Circuits", in Proc. IEEE Int. Symposium on Circuits and Systems, pp. 348- 351, May 1990.
• 2: G. Gad-E1-Karim and R. S. Gyurcsik, "Use of Performance Sensitivities in Analog Cell Layout", in Proc. IEEE Int. Symposium on Circuits and Systems, volume 4, pp. 2008-2011, June 1991.
• 3: Umakanta Choudhury , A. Sangiovanni-Vincentelli, Constraint generation for routing analog circuits, Proceedings of the 27th ACM/IEEE conference on Design automation, p.561-566, June 24-27, 1990, Orlando, Florida, United States [doi>10.1145/123186.123403]
• 4: E. Malavasi, U. Choudhury and A. L. Sangiovanni-Vincentelli, "A Routing Methodology for Analog Integrated Circuits", in Proc. IEEE ICCAD, pp. 202-205, November 1990.
• 5: E. Charbon, E. Malavasi, U. Choudhury, A. Casotto and A. L. Sangiovanni-Vincentelli, "A Constraint-Driven Placement Methodology for Analog Integrated Circuits", in Proc. IEEE CICC, pp. 2821-2824, May 1992.
• 6: E. Malavasi, E. Felt, E. Charbon and A. L. Sangiovanni- Vincentelli, "Symbolic Compaction with Analog Constraints", International Journal of Circuit Theo17 and Applications, Special Issue on "Analog Tools for Circuit Design", John Wiley & Sons, vol. 23, n. 4, pp. 433-452, July-August 1995.
• 7: E. Malavasi, E. Charbon, E. Felt and A. L. Sangiovanni- Vincentelli, "Automation of IC Layout with Analog Constraints", IEEE Trans. on CAD, vol. 15, n. 8, pp. 923-942, August 1996.
• 8: Edoardo Charbon , Enrico Malavasi , Alberto Sangiovanni-Vincentelli, Generalized constraint generation for analog circuit design, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.408-414, November 07-11, 1993, Santa Clara, California, United States
• 9: M. J. M. Pelgrom, A. C. J. Duinmaijer and A. P. G. Welbers, "Matching Properties of MOS Transistors", IEEE Journal of Solid State Circuits, vol. SC-24, pp. 1433-1440, October 1989.
• 10: H. Chang, A. L. Sangiovanni-Vincentelli, F. Balarin, E. Charbon, U. Choudhury, G. Jusuf, E. Liu, E. Malavasi, R. Neff and E Gray, "A Top-down, Constraint-Driven Design Methodology for Analog Integrated Circuits", in Proc. IEEE CICC, pp. 841-846, May 1992.
• 11: D.A. Hocevar, E Yang, T. N. Trick and B. D. Epler, "Transient Sensitivity Computation for MOSFET Circuits", IEEE Trans. on CAD, vol. CAD-4, n. 4, pp. 609-620, October 1985.
• 12: S. W. Director and R. A. Rohrer, "The Generalized Adjoint Network and Network Sensitivities", IEEE Trans. on Circuit Theo~7, vol. CT-16, pp. 318-323, August 1969.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Layout

Additional Classification:
  G. Mathematics of Computing
  G.1 NUMERICAL ANALYSIS
      G.1.6 Optimization
          Subjects: Constrained optimization

General Terms:
Design, Measurement, Performance

Keywords:
constraint-driven layout synthesis, constraint generation, non-deterministic parasitics