Synthesis of reusable DSP cores based on multiple behaviors

ABSTRACT

Design with cores has become popular recently because it can decrease the design time and ease the complexity of the design process. This paper presents a new method for the design of DSP cores based on multiple behaviors. This method uses redesign technique based on reallocation transformations to extract those RTL components in an initial RTL structure which are highly reusable and uses them to construct a DSP core. Experimental results are provided to illustrate the high reusability of core, extracted from given behaviors, when it accommodates new behaviors.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: VLSI (very large scale integration)

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Layout

General Terms:
Algorithms, Design, Experimentation

Keywords:
RTL components, RTL structure, design process complexity, design time, digital signal processing chips, multiple behaviors, reusable DSP cores synthesis